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研究成果 1998 2019

  • 700 引文
  • 12 h-指數
  • 46 Conference contribution
  • 37 Article
  • 3 Conference article
  • 2 Paper
篩選
Conference article
2005

High-density logic techniques with reduced-stack double-gate MOSFETs

Chiang, M-H., Kim, K., Chuang, C. T. & Tretz, C., 2005 十二月 1, 於 : Proceedings - IEEE International SOI Conference. 2005, p. 85-86 2 p., 1563544.

研究成果: Conference article

2004
15 引文 (Scopus)

Novel high-density low-power high-performance double-gate logic techniques

Chiang, M. H., Kim, K., Tretz, C. & Chuang, C. T., 2004 十二月 1, 於 : Proceedings - IEEE International SOI Conference. p. 122-123 2 p.

研究成果: Conference article

Logic gates
Simulators
Logic circuits
Transistors
Networks (circuits)
1999
12 引文 (Scopus)

Analysis and control of hysteresis in PD/SOI CMOS

Pelella, M. M., Fossum, J. G., Chiang, M. H., Workman, G. O. & Tretz, C. R., 1999 十二月 1, 於 : Technical Digest - International Electron Devices Meeting. p. 831-834 4 p.

研究成果: Conference article

SOI (semiconductors)
Hysteresis
CMOS
hysteresis
methodology