A CMOS rail-to-rail comparator operating at low-voltage supply by using a conventional fabrication process is proposed. Based on the comparator, an analog rank-order extractor with κ winner-take-all capability is presented. An experimental chip was fabricated using 0.5 μm CMOS technology. Measured results at 1-V supply voltage show a comparator response time of 4 μs for 10-mV precision and that the extractor within 4 μs successfully identifies a 100-mV differential voltage among inputs to find a rank order of the input set.
|頁（從 - 到）||673-677|
|期刊||IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications|
|出版狀態||Published - 2003 五月 1|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering