1-V CMOS similarity measurement chip for binary pattern identification

Yu Cherng Hung, Bin Da Liu

研究成果: Paper

1 引文 (Scopus)

摘要

Design of a new low-voltage similarity measurement circuit is proposed in this paper. The similarity measurement between two binary patterns is represented by Hamming metric, that is, average absolute differential function. Using clock bootstrapped and level shift techniques, the supply voltage of the circuit is reduced to 1 V, which can efficiently operate within a battery supply. Some simple elements such as capacitor array, switch, and exclusive NOR gates are adopted to achieve Hamming metric function. An experimental chip is implemented by using a 0.25 μm CMOS technology. The simulation results show the circuit responds a 21-mV difference for each one-pixel difference between two binary patterns. The patterns have dimension 6×4 pixels.

原文English
頁面36-39
頁數4
出版狀態Published - 2005 十月 31
事件9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA - Hsinchu, Taiwan
持續時間: 2005 五月 282005 五月 30

Other

Other9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA
國家Taiwan
城市Hsinchu
期間05-05-2805-05-30

指紋

Networks (circuits)
Pixels
Voltage measurement
Clocks
Capacitors
Switches
Electric potential

All Science Journal Classification (ASJC) codes

  • Software

引用此文

Hung, Y. C., & Liu, B. D. (2005). 1-V CMOS similarity measurement chip for binary pattern identification. 36-39. 論文發表於 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan.
Hung, Yu Cherng ; Liu, Bin Da. / 1-V CMOS similarity measurement chip for binary pattern identification. 論文發表於 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan.4 p.
@conference{65b84ac156214319846bcb989307f036,
title = "1-V CMOS similarity measurement chip for binary pattern identification",
abstract = "Design of a new low-voltage similarity measurement circuit is proposed in this paper. The similarity measurement between two binary patterns is represented by Hamming metric, that is, average absolute differential function. Using clock bootstrapped and level shift techniques, the supply voltage of the circuit is reduced to 1 V, which can efficiently operate within a battery supply. Some simple elements such as capacitor array, switch, and exclusive NOR gates are adopted to achieve Hamming metric function. An experimental chip is implemented by using a 0.25 μm CMOS technology. The simulation results show the circuit responds a 21-mV difference for each one-pixel difference between two binary patterns. The patterns have dimension 6×4 pixels.",
author = "Hung, {Yu Cherng} and Liu, {Bin Da}",
year = "2005",
month = "10",
day = "31",
language = "English",
pages = "36--39",
note = "9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA ; Conference date: 28-05-2005 Through 30-05-2005",

}

Hung, YC & Liu, BD 2005, '1-V CMOS similarity measurement chip for binary pattern identification', 論文發表於 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan, 05-05-28 - 05-05-30 頁 36-39.

1-V CMOS similarity measurement chip for binary pattern identification. / Hung, Yu Cherng; Liu, Bin Da.

2005. 36-39 論文發表於 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan.

研究成果: Paper

TY - CONF

T1 - 1-V CMOS similarity measurement chip for binary pattern identification

AU - Hung, Yu Cherng

AU - Liu, Bin Da

PY - 2005/10/31

Y1 - 2005/10/31

N2 - Design of a new low-voltage similarity measurement circuit is proposed in this paper. The similarity measurement between two binary patterns is represented by Hamming metric, that is, average absolute differential function. Using clock bootstrapped and level shift techniques, the supply voltage of the circuit is reduced to 1 V, which can efficiently operate within a battery supply. Some simple elements such as capacitor array, switch, and exclusive NOR gates are adopted to achieve Hamming metric function. An experimental chip is implemented by using a 0.25 μm CMOS technology. The simulation results show the circuit responds a 21-mV difference for each one-pixel difference between two binary patterns. The patterns have dimension 6×4 pixels.

AB - Design of a new low-voltage similarity measurement circuit is proposed in this paper. The similarity measurement between two binary patterns is represented by Hamming metric, that is, average absolute differential function. Using clock bootstrapped and level shift techniques, the supply voltage of the circuit is reduced to 1 V, which can efficiently operate within a battery supply. Some simple elements such as capacitor array, switch, and exclusive NOR gates are adopted to achieve Hamming metric function. An experimental chip is implemented by using a 0.25 μm CMOS technology. The simulation results show the circuit responds a 21-mV difference for each one-pixel difference between two binary patterns. The patterns have dimension 6×4 pixels.

UR - http://www.scopus.com/inward/record.url?scp=27144439203&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=27144439203&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:27144439203

SP - 36

EP - 39

ER -

Hung YC, Liu BD. 1-V CMOS similarity measurement chip for binary pattern identification. 2005. 論文發表於 9th IEEE International Workshop on Cellular Neural Networks and their Applications, CNNA, Hsinchu, Taiwan.