60-GHz CMOS Doppler Radar Sensor with Integrated V-Band Power Detector for Clutter Monitoring and Automatic Clutter-Cancellation in Noncontact Vital-Signs Sensing

Chien Chang Chou, Wen Chian Lai, Yi Kai Hsiao, Huey Ru Chuang

研究成果: Article

3 引文 (Scopus)

摘要

This paper presents the design of a V-band logarithmic power detector (PD) and the integration with a 60-GHz CMOS vital-signs Doppler radar sensor to be incorporated with a microprocessor control unit (MCU) for fast automatic clutter cancellation. The PD adopts the successive detection logarithmic amplifier (SDLA) topology and achieves a high dynamic range by replacing the limited amplifiers with millimeter-wave (MMW) linear amplifiers. From the measurement results, the PD exhibits a dynamic range and logarithmic errors higher than 35 dB and within ±2 dB from 50 to 62 GHz. The whole integrated radar sensor chip is fabricated by a 90-nm CMOS process with a chip size of 2 mm ×2.34 mm and a dc power consuming of 243 mW. The radar chip and a 60-GHz 17-dBi patch-Array antenna are integrated by bondwire interconnection on a compact single carrier board for experimental test. By incorporating the MCU to the radar chip board, the fast automatic clutter canceling can achieve more than 25-dB clutter cancellation. Moreover, it shows a successful vital-signs detection for a distance more than 1.2 m.

原文English
頁(從 - 到)1635-1643
頁數9
期刊IEEE Transactions on Microwave Theory and Techniques
66
發行號3
DOIs
出版狀態Published - 2018 三月

指紋

Doppler radar
clutter
extremely high frequencies
cancellation
CMOS
Radar
chips
Detectors
radar
Microprocessor chips
Monitoring
sensors
detectors
Sensors
microprocessors
Logarithmic amplifiers
dynamic range
amplifiers
linear amplifiers
range errors

All Science Journal Classification (ASJC) codes

  • Radiation
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

引用此文

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title = "60-GHz CMOS Doppler Radar Sensor with Integrated V-Band Power Detector for Clutter Monitoring and Automatic Clutter-Cancellation in Noncontact Vital-Signs Sensing",
abstract = "This paper presents the design of a V-band logarithmic power detector (PD) and the integration with a 60-GHz CMOS vital-signs Doppler radar sensor to be incorporated with a microprocessor control unit (MCU) for fast automatic clutter cancellation. The PD adopts the successive detection logarithmic amplifier (SDLA) topology and achieves a high dynamic range by replacing the limited amplifiers with millimeter-wave (MMW) linear amplifiers. From the measurement results, the PD exhibits a dynamic range and logarithmic errors higher than 35 dB and within ±2 dB from 50 to 62 GHz. The whole integrated radar sensor chip is fabricated by a 90-nm CMOS process with a chip size of 2 mm ×2.34 mm and a dc power consuming of 243 mW. The radar chip and a 60-GHz 17-dBi patch-Array antenna are integrated by bondwire interconnection on a compact single carrier board for experimental test. By incorporating the MCU to the radar chip board, the fast automatic clutter canceling can achieve more than 25-dB clutter cancellation. Moreover, it shows a successful vital-signs detection for a distance more than 1.2 m.",
author = "Chou, {Chien Chang} and Lai, {Wen Chian} and Hsiao, {Yi Kai} and Chuang, {Huey Ru}",
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AU - Chou, Chien Chang

AU - Lai, Wen Chian

AU - Hsiao, Yi Kai

AU - Chuang, Huey Ru

PY - 2018/3

Y1 - 2018/3

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