This paper presents the design of a V-band logarithmic power detector (PD) and the integration with a 60-GHz CMOS vital-signs Doppler radar sensor to be incorporated with a microprocessor control unit (MCU) for fast automatic clutter cancellation. The PD adopts the successive detection logarithmic amplifier (SDLA) topology and achieves a high dynamic range by replacing the limited amplifiers with millimeter-wave (MMW) linear amplifiers. From the measurement results, the PD exhibits a dynamic range and logarithmic errors higher than 35 dB and within ±2 dB from 50 to 62 GHz. The whole integrated radar sensor chip is fabricated by a 90-nm CMOS process with a chip size of 2 mm ×2.34 mm and a dc power consuming of 243 mW. The radar chip and a 60-GHz 17-dBi patch-Array antenna are integrated by bondwire interconnection on a compact single carrier board for experimental test. By incorporating the MCU to the radar chip board, the fast automatic clutter canceling can achieve more than 25-dB clutter cancellation. Moreover, it shows a successful vital-signs detection for a distance more than 1.2 m.
|頁（從 - 到）||1635-1643|
|期刊||IEEE Transactions on Microwave Theory and Techniques|
|出版狀態||Published - 2018 三月|
All Science Journal Classification (ASJC) codes