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• A 1.2 v 490 μw Sub-GHz UWB CMOS LNA with Current Reuse Negative Feedback

  Chen, W. W., Yang, S. D. & Cheng, K. W., 2018 4月 26, 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8350952. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2018-May).

  研究成果: Conference contribution
  7 引文 斯高帕斯（Scopus）

• A 1.2-V low LO-power 3-5 GHz broadband CMOS folded-switching mixer for UWB receiver

  Wang, H. Y., Wei, K. F., Lin, J. S. & Chuang, H. R., 2008 9月 22, Proceedings of the 2008 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2008. p. 621-624 4 p. 4561514. (Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium).

  研究成果: Conference contribution
  11 引文 斯高帕斯（Scopus）

• A 1.2 V rail-to-rail analog CMOS rank-order filter with k-WTA capability

  Hung, Y. C. & Liu, B. D., 2002 9月, 於: Analog Integrated Circuits and Signal Processing. 32, 3, p. 219-230 12 p.

  研究成果: Article › 同行評審
  10 引文 斯高帕斯（Scopus）

• A 1.3 mW low-IF, current-reuse, and current-bleeding RF front-end for the MICS band with sensitivity of -97 dbm

  Cruz, H., Huang, H. Y., Lee, S. Y. & Luo, C. H., 2015 6月 1, 於: IEEE Transactions on Circuits and Systems I: Regular Papers. 62, 6, p. 1627-1636 10 p., 7112577.

  研究成果: Article › 同行評審
  24 引文 斯高帕斯（Scopus）

• A 1.5-bit/stage pipeline ADC with FFT-based calibration method

  Liang, M. C., Hsieh, C. H. & Lee, S-Y., 2013 9月 9, 2013 IEEE International Symposium on Circuits and Systems, ISCAS 2013. p. 2042-2045 4 p. 6572273. (Proceedings - IEEE International Symposium on Circuits and Systems).

  研究成果: Conference contribution
  5 引文 斯高帕斯（Scopus）

• A 1.5-V 6-10-GHz low LO-power broadband CMOS folded-mirror mixer for UWB radio

  Chung, H. W., Kuo, H. C. & Chuang, H. R., 2007 12月 1, 2007 Asia-Pacific Microwave Conference, APMC. 4555048. (Asia-Pacific Microwave Conference Proceedings, APMC).

  研究成果: Conference contribution
  9 引文 斯高帕斯（Scopus）

• A 1.6-Gs/s 8b flash-SAR time-interleaved ADC with top-plate residue based gain calibration

  Hsu, C. W. & Chang, S. J., 2021, 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 9401198. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2021-May).

  研究成果: Conference contribution

• A 1.6uW G_m-C coninuous-time sigma-delta modulator with increasing linearity technology for bio-signal acquisitions

  Hsueh, C. P., Liang, M. C., Hong, J. H. & Lee, S-Y., 2014 1月 1, 2014 IEEE International Symposium on Bioelectronics and Bioinformatics, IEEE ISBB 2014. IEEE Computer Society, 6820920. (2014 IEEE International Symposium on Bioelectronics and Bioinformatics, IEEE ISBB 2014).

  研究成果: Conference contribution
  2 引文 斯高帕斯（Scopus）

• A 100-Channel 1-mW implantable neural recording IC

  Zou, X., Liu, L., Cheong, J. H., Yao, L., Li, P., Cheng, M. Y., Goh, W. L., Rajkumar, R., Dawe, G. S., Cheng, K. W. & Je, M., 2013, 於: IEEE Transactions on Circuits and Systems I: Regular Papers. 60, 10, p. 2584-2596 13 p., 6479332.

  研究成果: Article › 同行評審
  92 引文 斯高帕斯（Scopus）

• A 100 ka record of water tables and paleoclimates from salt cores, Death Valley, California

  Li, J., Lowenstein, T. K., Brown, C. B., Ku, T. L. & Luo, S., 1996 7月, 於: Palaeogeography, Palaeoclimatology, Palaeoecology. 123, 1-4, p. 179-203 25 p.

  研究成果: Article › 同行評審
  86 引文 斯高帕斯（Scopus）

• A 100-pA Adaptive-FOCV MPPT Circuit with >99.6% Tracking Efficiency for Indoor Light Energy Harvesting

  Huang, P. C. & Kuo, T. H., 2019 11月, Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019. Institute of Electrical and Electronics Engineers Inc., p. 185-188 4 p. 9056929. (Proceedings - 2019 IEEE Asian Solid-State Circuits Conference, A-SSCC 2019).

  研究成果: Conference contribution
  3 引文 斯高帕斯（Scopus）

• A 100 W 5.1-channel digital class-D audio amplifier with single-chip design

  Liu, J. M., Chien, S. H. & Kuo, T. H., 2012, 於: IEEE Journal of Solid-State Circuits. 47, 6, p. 1344-1354 11 p., 6177693.

  研究成果: Article › 同行評審
  23 引文 斯高帕斯（Scopus）

• A 1040 GHz broadband subharmonic monolithic mixer in 0.18 μ m CMOS technology

  Lin, C. M., Lin, H. K., Lai, Y. A., Chang, C. P. & Wang, Y. H., 2009 2月, 於: IEEE Microwave and Wireless Components Letters. 19, 2, p. 95-97 3 p., 4770129.

  研究成果: Article › 同行評審
  19 引文 斯高帕斯（Scopus）

• A 106 ka paleoclimate record from drill core of the Salar de Atacama, northern Chile

  Bobst, A. L., Lowenstein, T. K., Jordan, T. E., Godfrey, L. V., Ku, T. L. & Luo, S., 2001 9月 1, 於: Palaeogeography, Palaeoclimatology, Palaeoecology. 173, 1-2, p. 21-42 22 p.

  研究成果: Article › 同行評審
  165 引文 斯高帕斯（Scopus）

• A 10b 100kS/s SAR ADC with charge recycling switching method

  Chiang, K. H., Chang, S. J., Huang, G. Y. & Lin, Y. Z., 2015 1月 13, 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers. Institute of Electrical and Electronics Engineers Inc., p. 329-332 4 p. 7008927. (2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers).

  研究成果: Conference contribution
  3 引文 斯高帕斯（Scopus）

• A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation

  Liu, C. C., Chang, S. J., Huang, G. Y., Lin, Y. Z., Huang, C. M., Huang, C. H., Bu, L. & Tsai, C. C., 2010 5月 18, 2010 IEEE International Solid-State Circuits Conference, ISSCC 2010 - Digest of Technical Papers. p. 386-387 2 p. 5433970. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; 卷 53).

  研究成果: Conference contribution
  254 引文 斯高帕斯（Scopus）

• A 10b 200MS/s 0.82mW SAR ADC in 40nm CMOS

  Huang, G. Y., Chang, S. J., Lin, Y. Z., Liu, C. C. & Huang, C. P., 2013 12月 1, Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013. p. 289-292 4 p. 6691039. (Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013).

  研究成果: Conference contribution
  34 引文 斯高帕斯（Scopus）

• A 10-bit 12-MS/s successive approximation ADC with 1.2-pF input capacitance

  Huang, G. Y., Liu, C. C., Lin, Y. Z. & Chang, S. J., 2009 12月 1, Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009. p. 157-160 4 p. 5357202. (Proceedings of Technical Papers - 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009).

  研究成果: Conference contribution
  21 引文 斯高帕斯（Scopus）

• A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC

  Hu, H. J., Cheng, Y. S. & Chang, S. J., 2019, 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 8702455. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2019-May).

  研究成果: Conference contribution
  3 引文 斯高帕斯（Scopus）

• A 10-bit 350-MSample/s Nyquist CMOS D/A converter

  Chang, J. D., Ou, H. H. & Liu, B-D., 2004 12月 1, p. 621-624. 4 p.

  研究成果: Paper › 同行評審

• A 10-bit 50-MS/s SAR ADC for dual-voltage domain portable systems

  Tsai, W. H., Kuo, C. H., Chang, S. J., Lo, L. T., Wu, Y. C. & Chen, C. J., 2015 7月 27, 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015. Institute of Electrical and Electronics Engineers Inc., p. 2425-2428 4 p. 7169174. (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2015-July).

  研究成果: Conference contribution
  6 引文 斯高帕斯（Scopus）

• A 10-bit 50-MS/s SAR ADC with a monotonic capacitor switching procedure

  Liu, C. C., Chang, S. J., Huang, G. Y. & Lin, Y. Z., 2010 4月, 於: IEEE Journal of Solid-State Circuits. 45, 4, p. 731-740 10 p., 5437496.

  研究成果: Article › 同行評審
  857 引文 斯高帕斯（Scopus）

• A 10-bit 50-MS/s SAR ADC with techniques for relaxing the requirement on driving capability of reference voltage buffers

  Wan, S. H., Kuo, C. H., Chang, S-J., Huang, G. Y., Huang, C. P., Ren, G. J., Chiou, K. T. & Ho, C. H., 2013, Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013. p. 293-296 4 p. 6691040

  研究成果: Conference contribution
  19 引文 斯高帕斯（Scopus）

• A 10-bit 60-MS/s low-power pipelined ADC with split-capacitor CDS technique

  Lin, J. F., Chang, S. J., Liu, C. C. & Huang, C. H., 2010 3月, 於: IEEE Transactions on Circuits and Systems II: Express Briefs. 57, 3, p. 163-167 5 p., 5431013.

  研究成果: Article › 同行評審
  24 引文 斯高帕斯（Scopus）

• A 10-bit segmented digital-to-time converter with 10-ps-level resolution and offset calibration circuits

  Chu, K. H., Chen, T. A. & Wei, C. L., 2016 8月 12, 2016 5th International Symposium on Next-Generation Electronics, ISNE 2016. Institute of Electrical and Electronics Engineers Inc., 7543359. (2016 5th International Symposium on Next-Generation Electronics, ISNE 2016).

  研究成果: Conference contribution
  2 引文 斯高帕斯（Scopus）

• A 10-fJ/bit/dB half-rate equalizer with charge-average switched-capacitor summation technique

  Lee, Y. L. & Chang, S. J., 2016 8月 12, 2016 5th International Symposium on Next-Generation Electronics, ISNE 2016. Institute of Electrical and Electronics Engineers Inc., 7543355. (2016 5th International Symposium on Next-Generation Electronics, ISNE 2016).

  研究成果: Conference contribution

• A 10-fold improvement in the precision of boron isotopic analysis by negative thermal ionization mass spectrometry

  Shen, J. J. S. & You, C. F., 2003 5月 1, 於: Analytical chemistry. 75, 9, p. 1972-1977 6 p.

  研究成果: Article › 同行評審
  20 引文 斯高帕斯（Scopus）

• A 10-GS/s NRZ/Mixing DAC with Switching-Glitch Compensation Achieving SFDR >64/50 dBc over the First/Second Nyquist Zone

  Huang, H. Y., Chen, X. Y. & Kuo, T. H., 2021 10月, 於: IEEE Journal of Solid-State Circuits. 56, 10, p. 3145-3156 12 p.

  研究成果: Article › 同行評審

• A 10-item Fugl-Meyer Motor Scale Based on Machine Learning

  Lin, G. H., Huang, C. Y., Lee, S. C., Chen, K. L., Lien, J. J. J., Chen, M. H., Huang, Y. H. & Hsieh, C. L., 2021 4月 1, 於: Physical therapy. 101, 4

  研究成果: Article › 同行評審
  1 引文 斯高帕斯（Scopus）

• A 10 nm MOSFET concept

  Appenzeller, J., Martel, R., Solomon, P., Chan, K., Avouris, P., Knoch, J., Benedict, J., Tanner, M., Thomas, S., Wang, K. L. & Del Alamo, J. A., 2001 5月, 於: Microelectronic Engineering. 56, 1-2, p. 213-219 7 p.

  研究成果: Article › 同行評審
  17 引文 斯高帕斯（Scopus）

• A118G polymorphism of OPRM1 gene caused different morphine consumption in female patients after total knee replacement

  Chou, W. Y. & Hsu, C. J., 2021 7月, 於: Journal of Orthopaedic Science. 26, 4, p. 629-635 7 p.

  研究成果: Article › 同行評審
  2 引文 斯高帕斯（Scopus）

• A 11-bit 35-MS/s wide input range SAR ADC in 180-nm CMOS process

  Luo, W. C., Chang, S. J., Huang, C. P. & Wu, H. S., 2018 6月 5, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., p. 1-4 4 p. (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018).

  研究成果: Conference contribution

• A 12-36 GHz PHEMT MMIC balanced frequency tripler

  Chiu, J. C., Chang, C. P., Houng, M. P. & Wang, Y. H., 2006 1月, 於: IEEE Microwave and Wireless Components Letters. 16, 1, p. 19-21 3 p.

  研究成果: Article › 同行評審
  38 引文 斯高帕斯（Scopus）

• A 12b 1.6GS/s 40mW DAC in 40nm CMOS with >70dB SFDR over entire Nyquist bandwidth

  Lin, W. T. & Kuo, T-H., 2013 4月 29, 2013 IEEE International Solid-State Circuits Conference, ISSCC 2013 - Digest of Technical Papers. p. 474-475 2 p. 6487821. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference; 卷 56).

  研究成果: Conference contribution
  27 引文 斯高帕斯（Scopus）

• A 12-b 40-MS/s Calibration-Free SAR ADC

  Hsu, C. W., Chang, S. J., Huang, C. P., Chang, L. J., Shyu, Y. T., Hou, C. H., Tseng, H. A., Kung, C. Y. & Hu, H. J., 2018 3月, 於: IEEE Transactions on Circuits and Systems I: Regular Papers. 65, 3, p. 881-890 10 p.

  研究成果: Article › 同行評審
  18 引文 斯高帕斯（Scopus）

• A 12-bit 40-MS/s calibration-free SAR ADC

  Hsu, C. W., Chang, L. J., Huang, C. P. & Chang, S. J., 2017 9月 25, IEEE International Symposium on Circuits and Systems: From Dreams to Innovation, ISCAS 2017 - Conference Proceedings. Institute of Electrical and Electronics Engineers Inc., 8050307. (Proceedings - IEEE International Symposium on Circuits and Systems).

  研究成果: Conference contribution
  3 引文 斯高帕斯（Scopus）

• A 12-bit 40 nm DAC achieving SFDR > 70 dB at 1.6 GS/s and IMD <-61dB at 2.8 GS/s with DEMDRZ technique

  Lin, W. T., Huang, H. Y. & Kuo, T. H., 2014 3月, 於: IEEE Journal of Solid-State Circuits. 49, 3, p. 708-717 10 p., 6736139.

  研究成果: Article › 同行評審
  62 引文 斯高帕斯（Scopus）

• A 12-bit 4-kHz incremental ADC with loading-free extended counting technique

  Chao, I. J., Huang, C. C., Wu, Y. C., Liu, B-D., Huang, C. Y. & Lin, J-M., 2013 5月 27, p. 29-32. 4 p.

  研究成果: Paper › 同行評審
  4 引文 斯高帕斯（Scopus）

• A 12-bit cyclic ADC with random feedback capacitor interchanging technique

  Kuo, C. H., Fan, T. H. & Kuo, T-H., 2009 12月 1, 2009 International SoC Design Conference, ISOCC 2009. p. 508-511 4 p. 5423834. (2009 International SoC Design Conference, ISOCC 2009).

  研究成果: Conference contribution
  2 引文 斯高帕斯（Scopus）

• A 12-Bit Time-Interleaved 400-MS/s Pipelined ADC with Split-ADC Digital Background Calibration in 4,000 Conversions/Channel

  Hung, T. C., Liao, F. W. & Kuo, T. H., 2019 11月, 於: IEEE Transactions on Circuits and Systems II: Express Briefs. 66, 11, p. 1810-1814 5 p., 8631012.

  研究成果: Article › 同行評審
  7 引文 斯高帕斯（Scopus）

• A 13.56 MHz, 162 mW magnetically coupled digital rectifier with 94% VCR, 96% PCE over 50-to-5k Ω load range, and embedded 80 kbps DBPSK demodulator for biomedical applications

  Cruz, H., Lee, S. Y. & Luo, C. H., 2017 2月 6, 2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings. Institute of Electrical and Electronics Engineers Inc., p. 209-212 4 p. 7844172. (2016 IEEE Asian Solid-State Circuits Conference, A-SSCC 2016 - Proceedings).

  研究成果: Conference contribution
  2 引文 斯高帕斯（Scopus）

• A 14-bit low power 2-ms/s sar adc with residue oversampling*

  Huang, S. W., Chang, L. J. & Chang, S. J., 2020 6月, 於: International Journal of Electrical Engineering. 27, 3, p. 105-114 10 p.

  研究成果: Article › 同行評審

• A 15-bit 20 MS/s SHA-Less Pipelined ADC Achieving 73.7 dB SNDR with averaging correlated level shifting technique

  Wang, J. C., Hung, T. C. & Kuo, T. H., 2019 4月, 2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019. Institute of Electrical and Electronics Engineers Inc., 8741986. (2019 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019).

  研究成果: Conference contribution

• A 160 nW 25 kS/s 9-bit SAR ADC for neural signal recording applications

  Do, A. T., Lam, C. K., Tan, Y. S., Yeo, K. S., Cheong, J. H., Zou, X., Yao, L., Cheng, K-W. & Je, M., 2012 11月 7, 2012 IEEE 10th International New Circuits and Systems Conference, NEWCAS 2012. p. 525-528 4 p. 6329072. (2012 IEEE 10th International New Circuits and Systems Conference, NEWCAS 2012).

  研究成果: Conference contribution
  8 引文 斯高帕斯（Scopus）

• A 16-31 GHz miniature quadruple subharmonic monolithic mixer with lumped diplexer

  Lin, C. M., Chang, J. T., Su, C. C., Hung, S. H. & Wang, Y. H., 2009, 於: Progress in Electromagnetics Research Letters. 11, p. 21-30 10 p.

  研究成果: Article › 同行評審
  10 引文 斯高帕斯（Scopus）

• A 16-44 GHz compact doubly balanced monolithic ring mixer

  Lin, C. M., Lin, H. K., Lin, C. F., Lai, Y. A., Lin, C. H. & Wang, Y. H., 2008 9月, 於: IEEE Microwave and Wireless Components Letters. 18, 9, p. 620-622 3 p., 4624626.

  研究成果: Article › 同行評審
  14 引文 斯高帕斯（Scopus）

• A 16-GHz 0.18-μm CMOS differential colpitts VCO with a moderate output power for DS-UWB and 60-GHz applications

  Lee, C. C., Lu, C. L. & Chuang, H. R., 2006, 2006 Asia-Pacific Microwave Conference Proceedings, APMC. Institute of Electrical and Electronics Engineers Inc., p. 1132-1135 4 p. 4429607. (Asia-Pacific Microwave Conference Proceedings, APMC; 卷 2).

  研究成果: Conference contribution
  1 引文 斯高帕斯（Scopus）

• A 16-GHZ CMOS differential colpitis VCO for DS-UWB and 60-GHz direct-conversion receiver applications

  Lee, C. C., Chuang, H. R. & Lu, C. L., 2007 10月, 於: Microwave and Optical Technology Letters. 49, 10, p. 2489-2492 4 p.

  研究成果: Article › 同行評審
  6 引文 斯高帕斯（Scopus）

• A 16-kb Antifuse One-Time-Programmable Memory in 5-nm High-K Metal-Gate FinFET CMOS Featuring Bootstrap High-Voltage Scheme, Read Endpoint Detection, and Pseudodifferential Sensing

  Chou, S. Y. S., Chen, S., Chang, J. H., Cheng, W. H., Chih, Y. D., Fan, P., Huang, C. E., Hung, C. M., Li, G. H., Wang, Y., Wu, S. D. & Chang, T. Y. J., 2021, 於: IEEE Solid-State Circuits Letters. 4, p. 170-173 4 p.

  研究成果: Article › 同行評審

• A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing

  Chou, S., Li, G. H., Chen, S., Chang, J. H., Cheng, W. H., Wu, S. D., Fan, P., Huang, C. E., Chih, Y. D., Wang, Y. & Chang, J., 2021 6月 13, 2021 Symposium on VLSI Circuits, VLSI Circuits 2021. Institute of Electrical and Electronics Engineers Inc., 9492438. (IEEE Symposium on VLSI Circuits, Digest of Technical Papers; 卷 2021-June).

  研究成果: Conference contribution