This article proposes a low-complexity frequency equalization technique for pulsewidth modulation (PWM)-residual-aliasing reduction in closed-loop Class-D audio amplifiers to achieve both low total harmonic distortion plus noise (THD+N) and low quiescent current. Based on the comprehensive analysis on the phase shift delay between the audio input and the loop filter's output for the prior PWM-residual-aliasing reduction technique, the proposed technique minimizes the non-idealities via a frequency-equalization path to enhance the cancellation ability of high-frequency PWM switching components. In this way, the PWM-residual-aliasing distortion is greatly suppressed, thereby permitting Class-D audio amplifiers to achieve a further-reduced THD+N for the entire audio band while operating at a low switching frequency (fSW), leading to less quiescent current consumption. Moreover, due to the minimized phase shift delay, the required bias current of the loop filter's first operational amplifier for the target THD+N can be reduced, resulting in even lower quiescent current. Compared with other state of the arts, this work's high-fidelity second-order Class-D audio amplifier, fabricated with cost-efficient 0.5-μm CMOS technology, not only achieves a competitive minimal THD+N of 0.00091% for a 1-kHz input as well as the lowest maximal THD+N of 0.0027% over the entire audio band while operating at a low fSW of 168 kHz but also features both the highest figure of merit (FOM) of 2536 and the lowest quiescent current of 0.4 mA, surpassing the prior arts by a factor of 2.3.
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