A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems

Shuenn Yuh Lee, Chih Jen Cheng, Cheng Pin Wang, Shyh Chyang Lee

研究成果: Conference contribution

23 引文 (Scopus)

摘要

In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.

原文English
主出版物標題2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
頁面649-652
頁數4
DOIs
出版狀態Published - 2009 十月 26
事件2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan
持續時間: 2009 五月 242009 五月 27

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
ISSN(列印)0271-4310

Other

Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
國家Taiwan
城市Taipei
期間09-05-2409-05-27

指紋

Digital to analog conversion
Electric power utilization
Bias currents
Networks (circuits)
Operational amplifiers
Capacitors

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此文

Lee, S. Y., Cheng, C. J., Wang, C. P., & Lee, S. C. (2009). A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 (頁 649-652). [5117832] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2009.5117832
Lee, Shuenn Yuh ; Cheng, Chih Jen ; Wang, Cheng Pin ; Lee, Shyh Chyang. / A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems. 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009. 2009. 頁 649-652 (Proceedings - IEEE International Symposium on Circuits and Systems).
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abstract = "In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.",
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Lee, SY, Cheng, CJ, Wang, CP & Lee, SC 2009, A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009., 5117832, Proceedings - IEEE International Symposium on Circuits and Systems, 頁 649-652, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei, Taiwan, 09-05-24. https://doi.org/10.1109/ISCAS.2009.5117832

A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems. / Lee, Shuenn Yuh; Cheng, Chih Jen; Wang, Cheng Pin; Lee, Shyh Chyang.

2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009. 2009. p. 649-652 5117832 (Proceedings - IEEE International Symposium on Circuits and Systems).

研究成果: Conference contribution

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N2 - In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.

AB - In this paper, a 1-V 8-bit 10 kS/s successive approximation (SA) analog-to-digital converter (ADC) with ultra-low power characteristic is implemented for biosignal acquisition systems. To decrease power consumption, a passive sample-and-hold (SH) circuit and an opamp-free, capacitor-based digital-to-analog converter (DAC) are utilized. The only active circuit, a comparator, is implemented in the sub-threshold region to preserve the required bias current. According to the measured results, the ADC has a signal-to-noise distortion ratio (SNDR) of 45.2 dB, and peak spurious free dynamic range (SFDR) of 54 dB for a 1 kHz 500 mVpp input sine wave. The effective number of bits (ENOB) is 7.2. Its differential nonlinearity (DNL) and integral nonlinearity (INL) are -0.41/+0.38 and -0.89/+0.6 LSB, respectively. The total power consumption is 950 nW, and the figure of merit (FOM) is 3230 fJ/conversion-step. The active area, which is 0.93 x 0.93 mm2, is determined by using TSMC 0.18?m 1P6M CMOS process.

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Lee SY, Cheng CJ, Wang CP, Lee SC. A 1-V 8-bit 0.95μW successive approximation ADC for biosignal acquisition systems. 於 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009. 2009. p. 649-652. 5117832. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2009.5117832