A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC

Huan Jui Hu, Yi Shen Cheng, Soon-Jyh Chang

研究成果: Conference contribution

摘要

This paper presents a 2x-interleaved 10-bit successive-approximation register (SAR) analog-to-digital converter (ADC) that performs 9.73 ENOB under 1-GS/s in 40nm with post-layout simulation. A bootstrapped switch circuit is proposed for 2x-interleaved structure using global master clock without any timing-skew calibration. In each channel, a sub-range SAR ADC sharing a common coarse SAR ADC with loop-unrolling technique is proposed to enhance speed. This ADC consumes 9.02mW with a figure of merit (FoM) of 10.6fJ/conv-step in post-layout simulation and only covers an area of 0.096mm2

原文English
主出版物標題2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9781728103976
DOIs
出版狀態Published - 2019 一月 1
事件2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan
持續時間: 2019 五月 262019 五月 29

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2019-May
ISSN(列印)0271-4310

Conference

Conference2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
國家Japan
城市Sapporo
期間19-05-2619-05-29

指紋

Digital to analog conversion
Calibration
Clocks
Switches
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此文

Hu, H. J., Cheng, Y. S., & Chang, S-J. (2019). A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC. 於 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings [8702455] (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702455
Hu, Huan Jui ; Cheng, Yi Shen ; Chang, Soon-Jyh. / A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC. 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. (Proceedings - IEEE International Symposium on Circuits and Systems).
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title = "A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC",
abstract = "This paper presents a 2x-interleaved 10-bit successive-approximation register (SAR) analog-to-digital converter (ADC) that performs 9.73 ENOB under 1-GS/s in 40nm with post-layout simulation. A bootstrapped switch circuit is proposed for 2x-interleaved structure using global master clock without any timing-skew calibration. In each channel, a sub-range SAR ADC sharing a common coarse SAR ADC with loop-unrolling technique is proposed to enhance speed. This ADC consumes 9.02mW with a figure of merit (FoM) of 10.6fJ/conv-step in post-layout simulation and only covers an area of 0.096mm2",
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Hu, HJ, Cheng, YS & Chang, S-J 2019, A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC. 於 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702455, Proceedings - IEEE International Symposium on Circuits and Systems, 卷 2019-May, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 19-05-26. https://doi.org/10.1109/ISCAS.2019.8702455

A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC. / Hu, Huan Jui; Cheng, Yi Shen; Chang, Soon-Jyh.

2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8702455 (Proceedings - IEEE International Symposium on Circuits and Systems; 卷 2019-May).

研究成果: Conference contribution

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Hu HJ, Cheng YS, Chang S-J. A 10-bit 1-GS/s 2x-interleaved timing-skew calibration free SAR ADC. 於 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. 8702455. (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2019.8702455