A 10b 100kS/s SAR ADC with charge recycling switching method

Kai Hsiang Chiang, Soon Jyh Chang, Guan Ying Huang, Ying Zu Lin

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

This paper presents a low-voltage and energy-efficient 10b SAR ADC which manipulates charge recycling switching method for saving the switching energy. In additional, a window-based reconfigurable comparator is used to achieve fast comparison and small power dissipation. The proposed 10b SAR ADC operates at 100kS/s with 0.4V supply voltage in 90nm CMOS. The measurement results show that the prototype ADC achieve 55.37dB SNDR at Nyquist rate with only 107nW. The Figure-of-Merit (FoM) is 2.23fJ/conv.-step.

原文English
主出版物標題2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers
發行者Institute of Electrical and Electronics Engineers Inc.
頁面329-332
頁數4
ISBN(電子)9781479940905
DOIs
出版狀態Published - 2015 一月 13
事件2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 - Kaohsiung, Taiwan
持續時間: 2014 十一月 102014 十一月 12

出版系列

名字2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers

Conference

Conference2014 10th IEEE Asian Solid-State Circuits Conference, A-SSCC 2014
國家Taiwan
城市Kaohsiung
期間14-11-1014-11-12

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Hardware and Architecture

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    Chiang, K. H., Chang, S. J., Huang, G. Y., & Lin, Y. Z. (2015). A 10b 100kS/s SAR ADC with charge recycling switching method. 於 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers (頁 329-332). [7008927] (2014 IEEE Asian Solid-State Circuits Conference, A-SSCC - Proceedings of Technical Papers). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASSCC.2014.7008927