This article presents a 2.4 GHz CMOS power amplifier (PA) with an output power of 20 dBm using a 0.25 μm 1P5M standard CMOS process. The PA uses a diode connected NMOS transistor functioning as a diode linearizer. It is believed that this is the first use of a diode linearization technique in a CMOS PA design. It shows an effective improvement in linearity from gain compression and adjacent channel power ratio (ACPR) measured results. The measurements are performed using an FR-4 PCB test fixture. The fabricated power amplifier exhibits an output power of 20 dBm and a power-added efficiency as high as 28 percent. The PA performance demonstrates the standard CMOS process potential for medium power RF amplification for 2.4 GHz wireless communications applications, such as Bluetooth and WLAN 802.11b.
|出版狀態||Published - 2003 一月 1|
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