A 24.9% Power Reduction Active Gate Driver With Power Gating and Current Modulation for Power MOSFETs

The configuration of an active gate driver (AGD) plays a crucial role in determining the performance and efficiency of power semiconductor devices. This research introduces a novel AGD that accurately detects the Miller plateau during turn-on and turn-off transitions using a a Differential timing-based Miller detector. Additionally, a power gating mechanism is implemented to deactivate N-1 PMOS devices in the Output stage, effectively minimizing power loss. To further enhance efficiency, a newly designed current modulation circuit is integrated, reducing overall power consumption. The AGD is fabricated using TSMC T18HVG2 process, and comprehensive measurements validate its functionality at an operating frequency of 500 kHz. Experimental results show that the average total power dissipation with power gating is 568 mW. Moreover, the combined power gating mechanism and current modulation circuit achieve a significant 24.9% reduction in static power dissipation.