A 3-input XOR/XNOR for low-voltage low-power applications

Chien Cheng Yu, Wei Ping Wang, Bin Da Liu

研究成果: Paper同行評審

4 引文 斯高帕斯(Scopus)

摘要

In this paper, we propose a 3-input XOR/XNOR circuit for low-voltage low-power applications. Several existing 3-input XOR/XNOR circuits and this proposed circuit have been fully simulated using HSPICE with a 0.35 μm CMOS technology from 3.3 V down to 2V supply voltage. The simulation results show that the proposed circuit has the benefits of better driving capability and lower power consumption as well as the least power-delay product than those of the existing circuits. Additionally, this circuit has a full voltage-swing in all internal nodes under 2 V supply voltage or less. Thus, the proposed circuit is suitable for low-voltage, low-power applications.

原文English
頁面505-508
頁數4
出版狀態Published - 2000 十二月 1
事件2000 IEEE Asia-Pacific Conference on Circuits and Systems: Electronic Communication Systems - Tianjin, China
持續時間: 2000 十二月 42000 十二月 6

Other

Other2000 IEEE Asia-Pacific Conference on Circuits and Systems: Electronic Communication Systems
國家China
城市Tianjin
期間00-12-0400-12-06

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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