A 40/30 MS/s Dual-Mode Pipelined ADC with Error Averaging Techniques in 90nm CMOS Achieving 71.2/74.5 dB SNDR over the Entire Nyquist Bandwidth

Tsung-chih Hung, Tai-haur Kuo

研究成果: Paper同行評審

原文English
頁面1-4
DOIs
出版狀態Published - 2019 四月
事件2019 IEEE Custom Integrated Circuits Conference (CICC) - Austin, TX, USA
持續時間: 2019 四月 142019 四月 17

Conference

Conference2019 IEEE Custom Integrated Circuits Conference (CICC)
期間19-04-1419-04-17

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