TY - GEN
T1 - A 5-bit 1 GSample/s two-stage ADC with a new flash folded architecture
AU - Huang, Hung Yu
AU - Lin, Ying Zu
AU - Chang, Soon Jyh
PY - 2007
Y1 - 2007
N2 - A 5-bit 1 GSample/s two-stage ADC is designed and simulated in TSMC 0.18-μm CMOS technology. The new architecture combines the characteristics of flash, subranging and folding ADC. The analog front-end of this work is the same as that of a typical flash ADC. By replacing folding amplifier with the current-mode multiplexer (MUX), cyclic thermometer code, the digital output of folding ADC, is obtained and frequency multiplication effect is avoided. Besides, the slow switching of the reference voltage range is also avoided. The number of the comparators is reduced to 16, and it is 32 typically. Operating at 1 GSample/s, the ENOB is 4.92 and 4.71 bit at input frequency 10 and 500 MHz, respectively. This ADC consumes 63mW from a 1.8 V supply, achieving FOMs of 2.4 pJ/conversion-step at 1 GSample/s.
AB - A 5-bit 1 GSample/s two-stage ADC is designed and simulated in TSMC 0.18-μm CMOS technology. The new architecture combines the characteristics of flash, subranging and folding ADC. The analog front-end of this work is the same as that of a typical flash ADC. By replacing folding amplifier with the current-mode multiplexer (MUX), cyclic thermometer code, the digital output of folding ADC, is obtained and frequency multiplication effect is avoided. Besides, the slow switching of the reference voltage range is also avoided. The number of the comparators is reduced to 16, and it is 32 typically. Operating at 1 GSample/s, the ENOB is 4.92 and 4.71 bit at input frequency 10 and 500 MHz, respectively. This ADC consumes 63mW from a 1.8 V supply, achieving FOMs of 2.4 pJ/conversion-step at 1 GSample/s.
UR - http://www.scopus.com/inward/record.url?scp=48649106607&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=48649106607&partnerID=8YFLogxK
U2 - 10.1109/TENCON.2007.4428897
DO - 10.1109/TENCON.2007.4428897
M3 - Conference contribution
AN - SCOPUS:48649106607
SN - 1424412722
SN - 9781424412723
T3 - IEEE Region 10 Annual International Conference, Proceedings/TENCON
BT - TENCON 2007 - 2007 IEEE Region 10 Conference
T2 - IEEE Region 10 Conference, TENCON 2007
Y2 - 30 October 2007 through 2 November 2007
ER -