摘要
This letter presents a 60-GHz millimeter-wave on-chip Yagi antenna fabricated with a 0.18- μ CMOS process. A feeding network is designed in a coplanar waveguide (CPW) technology. The 0.18-μ six-metal-layer CMOS process allows the on-chip antenna to utilize a simple CPW-to-coplanar-stripline feed transition and the first metal layer to implement a reflector strip. The CMOS antenna chip size is 1.1times; 0.95mm2. A FEM-based 3-D full-wave electromagnetic solver, the HFSS, is used for design simulation. The measured antenna input VSWR is less than two from 55 to 65 GHz. The front-to-back ratio of the Yagi antenna is about 9 dB. The measured maximum antenna power gain is about -10 dBi. The simulated antenna radiation efficiency is about 10%.
原文 | English |
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頁(從 - 到) | 625-627 |
頁數 | 3 |
期刊 | IEEE Electron Device Letters |
卷 | 29 |
發行號 | 6 |
DOIs | |
出版狀態 | Published - 2008 6月 |
All Science Journal Classification (ASJC) codes
- 電子、光磁材料
- 電氣與電子工程