A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic

Yongpan Liu, Zhibo Wang, Albert Lee, Fang Su, Chieh Pu Lo, Zhe Yuan, Chien Chen Lin, Qi Wei, Yu Wang, Ya Chin King, Chrong Jung Lin, Pedram Khalili, Kang Lung Wang, Meng Fan Chang, Huazhong Yang

研究成果: Conference contribution

79 引文 斯高帕斯(Scopus)

摘要

With the rising importance of energy efficiency, zero leakage power and instant-on capability are highly desired features in energy harvesting sensors, as well as normally off high performance processors. However, intermittent power in such systems requires nonvolatile memory (NVM) to hold intermediate data and avoid rollbacks. Previous work has adopted FeRAM and STT-MRAM to achieve zero-standby power and fast-restore nonvolatile processors (NVPs) [1-3]. Previous NVPs, however, suffer from several drawbacks: 1) Various power interrupt periods are not considered; 2) the 2-macro memory architecture slows access speed; 3) worst-case store/restore operations are always performed. We present a 65nm fully-CMOS-logic-compatible ReRAM-based NVP achieving time/space-adaptive data retention. A 1-macro nvSRAM with self-write-termination (SWT) is integrated to boost clock frequency and reduce store energy. The adaptive retention and SWT strategy relieve the ReRAM write endurance challenge (106-1012), making it sufficient for most applications. The NVP operates at 100MHz with 20ns/0.45nJ restore time (TRESTORE)/energy (ERESTORE), realizing 6× reduction in TRESTORE, >6000× reduction in ERESTORE and 4× higher clock frequency compared with existing designs.

原文English
主出版物標題2016 IEEE International Solid-State Circuits Conference, ISSCC 2016
發行者Institute of Electrical and Electronics Engineers Inc.
頁面84-86
頁數3
ISBN(電子)9781467394666
DOIs
出版狀態Published - 2016 二月 23
事件63rd IEEE International Solid-State Circuits Conference, ISSCC 2016 - San Francisco, United States
持續時間: 2016 一月 312016 二月 4

出版系列

名字Digest of Technical Papers - IEEE International Solid-State Circuits Conference
59
ISSN(列印)0193-6530

Other

Other63rd IEEE International Solid-State Circuits Conference, ISSCC 2016
國家United States
城市San Francisco
期間16-01-3116-02-04

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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