A 7.9 GHz low-power PMOS colpitts VCO using the gate inductive feedback

Jian An Hou; Yeong Her Wang

doi:10.1109/LMWC.2010.2042559

A 7.9 GHz low-power PMOS colpitts VCO using the gate inductive feedback

Jian An Hou, Yeong Her Wang

研究成果: Article › 同行評審

24 引文斯高帕斯（Scopus）

摘要

A low-power PMOS Colpitts voltage controlled oscillator (VCO) topology using the technique of gate inductive feedback is demonstrated. The topology enhances the negative conductance and overcomes the start-up difficulty of the conventional Colpitts VCO. This enables the Colpitts VCO to be operated in low-power consumption. The fabricated VCO operates from 7.4 to 7.9 GHz with 7% tuning range, a power consumption of 4.9 mW, and a supply voltage of 1.5 V. The measured phase noise at 1 MHz offset is 108.3 dBc/Hz at 7.9 GHz.

原文	English
文章編號	5428805
頁（從 - 到）	223-225
頁數	3
期刊	IEEE Microwave and Wireless Components Letters
卷	20
發行號	4
DOIs	https://doi.org/10.1109/LMWC.2010.2042559
出版狀態	Published - 2010 4月

All Science Journal Classification (ASJC) codes

凝聚態物理學
電氣與電子工程

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10.1109/LMWC.2010.2042559

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title = "A 7.9 GHz low-power PMOS colpitts VCO using the gate inductive feedback",

abstract = "A low-power PMOS Colpitts voltage controlled oscillator (VCO) topology using the technique of gate inductive feedback is demonstrated. The topology enhances the negative conductance and overcomes the start-up difficulty of the conventional Colpitts VCO. This enables the Colpitts VCO to be operated in low-power consumption. The fabricated VCO operates from 7.4 to 7.9 GHz with 7% tuning range, a power consumption of 4.9 mW, and a supply voltage of 1.5 V. The measured phase noise at 1 MHz offset is 108.3 dBc/Hz at 7.9 GHz.",

author = "Hou, {Jian An} and Wang, {Yeong Her}",

note = "Funding Information: Manuscript received November 08, 2009; revised December 05, 2009. First published March 11, 2010; current version published April 07, 2010. This work was supported in part by the National Chip Implementation Center, the National Applied Research Laboratories, the National Science Council of Taiwan under contract NSC97-2221-E-006-428-283, and the Foundation of Chen, Jieh-Chen Scholarship of Tainan, Taiwan.",

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N2 - A low-power PMOS Colpitts voltage controlled oscillator (VCO) topology using the technique of gate inductive feedback is demonstrated. The topology enhances the negative conductance and overcomes the start-up difficulty of the conventional Colpitts VCO. This enables the Colpitts VCO to be operated in low-power consumption. The fabricated VCO operates from 7.4 to 7.9 GHz with 7% tuning range, a power consumption of 4.9 mW, and a supply voltage of 1.5 V. The measured phase noise at 1 MHz offset is 108.3 dBc/Hz at 7.9 GHz.

AB - A low-power PMOS Colpitts voltage controlled oscillator (VCO) topology using the technique of gate inductive feedback is demonstrated. The topology enhances the negative conductance and overcomes the start-up difficulty of the conventional Colpitts VCO. This enables the Colpitts VCO to be operated in low-power consumption. The fabricated VCO operates from 7.4 to 7.9 GHz with 7% tuning range, a power consumption of 4.9 mW, and a supply voltage of 1.5 V. The measured phase noise at 1 MHz offset is 108.3 dBc/Hz at 7.9 GHz.

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A 7.9 GHz low-power PMOS colpitts VCO using the gate inductive feedback

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