A Built-Off Self-Repair Scheme for Channel-Based 3D Memories

Hsuan Hung Liu, Bing Yang Lin, Cheng Wen Wu, Wan Ting Chiang, Lee Mincent, Hung Chih Lin, Ching Nen Peng, Min Jer Wang

研究成果: Article

2 引文 (Scopus)

摘要

Redundancy repair is a commonly used technique for memory yield improvement. In order to ensure high repair rate and final product yield, it is necessary to develop a repair scheme for the coming three-dimensional (3D) architecture of stacked DRAM. According to the JEDEC mobile memory technology roadmap, the interface of 3D DRAM, including the Wide I/O and High-Bandwidth Memory (HBM), is mainly classified as channel-based memories. In this paper, we propose a built-off self-test (BOSR) scheme at the controller level for channel-based 3D memory to enhance final product yield after the bonding of a memory cube to its corresponding logic die. The logic die contains the Channel controller, in which the BOSR circuit resides. Experimental results show that the repair rate is high with higher cluster failure ratio due to the flexible algorithm we choose. The area overhead is low and it decreases significantly when the memory size or channel count increases. The performance penalty is also low due to the parallel execution of address comparison and repair. Moreover, the manufacture cost is lower than conventional DRAM architecture due to allocator-based redundancies. Finally, the proposed scheme can easily be applied to other channel-based 3D memories.

原文English
文章編號7850958
頁(從 - 到)1293-1301
頁數9
期刊IEEE Transactions on Computers
66
發行號8
DOIs
出版狀態Published - 2017 八月 1

指紋

Repair
Data storage equipment
Dynamic random access storage
Redundancy
Die
Logic
Controller
Cube
Controllers
Interfaces (computer)
Penalty
Count
Choose
Bandwidth
Decrease
Three-dimensional
Necessary
Networks (circuits)
Costs
Experimental Results

All Science Journal Classification (ASJC) codes

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

引用此文

Liu, H. H., Lin, B. Y., Wu, C. W., Chiang, W. T., Mincent, L., Lin, H. C., ... Wang, M. J. (2017). A Built-Off Self-Repair Scheme for Channel-Based 3D Memories. IEEE Transactions on Computers, 66(8), 1293-1301. [7850958]. https://doi.org/10.1109/TC.2017.2667645
Liu, Hsuan Hung ; Lin, Bing Yang ; Wu, Cheng Wen ; Chiang, Wan Ting ; Mincent, Lee ; Lin, Hung Chih ; Peng, Ching Nen ; Wang, Min Jer. / A Built-Off Self-Repair Scheme for Channel-Based 3D Memories. 於: IEEE Transactions on Computers. 2017 ; 卷 66, 編號 8. 頁 1293-1301.
@article{e1a9edd3a0be4c40962240fee7cb5676,
title = "A Built-Off Self-Repair Scheme for Channel-Based 3D Memories",
abstract = "Redundancy repair is a commonly used technique for memory yield improvement. In order to ensure high repair rate and final product yield, it is necessary to develop a repair scheme for the coming three-dimensional (3D) architecture of stacked DRAM. According to the JEDEC mobile memory technology roadmap, the interface of 3D DRAM, including the Wide I/O and High-Bandwidth Memory (HBM), is mainly classified as channel-based memories. In this paper, we propose a built-off self-test (BOSR) scheme at the controller level for channel-based 3D memory to enhance final product yield after the bonding of a memory cube to its corresponding logic die. The logic die contains the Channel controller, in which the BOSR circuit resides. Experimental results show that the repair rate is high with higher cluster failure ratio due to the flexible algorithm we choose. The area overhead is low and it decreases significantly when the memory size or channel count increases. The performance penalty is also low due to the parallel execution of address comparison and repair. Moreover, the manufacture cost is lower than conventional DRAM architecture due to allocator-based redundancies. Finally, the proposed scheme can easily be applied to other channel-based 3D memories.",
author = "Liu, {Hsuan Hung} and Lin, {Bing Yang} and Wu, {Cheng Wen} and Chiang, {Wan Ting} and Lee Mincent and Lin, {Hung Chih} and Peng, {Ching Nen} and Wang, {Min Jer}",
year = "2017",
month = "8",
day = "1",
doi = "10.1109/TC.2017.2667645",
language = "English",
volume = "66",
pages = "1293--1301",
journal = "IEEE Transactions on Computers",
issn = "0018-9340",
publisher = "IEEE Computer Society",
number = "8",

}

Liu, HH, Lin, BY, Wu, CW, Chiang, WT, Mincent, L, Lin, HC, Peng, CN & Wang, MJ 2017, 'A Built-Off Self-Repair Scheme for Channel-Based 3D Memories', IEEE Transactions on Computers, 卷 66, 編號 8, 7850958, 頁 1293-1301. https://doi.org/10.1109/TC.2017.2667645

A Built-Off Self-Repair Scheme for Channel-Based 3D Memories. / Liu, Hsuan Hung; Lin, Bing Yang; Wu, Cheng Wen; Chiang, Wan Ting; Mincent, Lee; Lin, Hung Chih; Peng, Ching Nen; Wang, Min Jer.

於: IEEE Transactions on Computers, 卷 66, 編號 8, 7850958, 01.08.2017, p. 1293-1301.

研究成果: Article

TY - JOUR

T1 - A Built-Off Self-Repair Scheme for Channel-Based 3D Memories

AU - Liu, Hsuan Hung

AU - Lin, Bing Yang

AU - Wu, Cheng Wen

AU - Chiang, Wan Ting

AU - Mincent, Lee

AU - Lin, Hung Chih

AU - Peng, Ching Nen

AU - Wang, Min Jer

PY - 2017/8/1

Y1 - 2017/8/1

N2 - Redundancy repair is a commonly used technique for memory yield improvement. In order to ensure high repair rate and final product yield, it is necessary to develop a repair scheme for the coming three-dimensional (3D) architecture of stacked DRAM. According to the JEDEC mobile memory technology roadmap, the interface of 3D DRAM, including the Wide I/O and High-Bandwidth Memory (HBM), is mainly classified as channel-based memories. In this paper, we propose a built-off self-test (BOSR) scheme at the controller level for channel-based 3D memory to enhance final product yield after the bonding of a memory cube to its corresponding logic die. The logic die contains the Channel controller, in which the BOSR circuit resides. Experimental results show that the repair rate is high with higher cluster failure ratio due to the flexible algorithm we choose. The area overhead is low and it decreases significantly when the memory size or channel count increases. The performance penalty is also low due to the parallel execution of address comparison and repair. Moreover, the manufacture cost is lower than conventional DRAM architecture due to allocator-based redundancies. Finally, the proposed scheme can easily be applied to other channel-based 3D memories.

AB - Redundancy repair is a commonly used technique for memory yield improvement. In order to ensure high repair rate and final product yield, it is necessary to develop a repair scheme for the coming three-dimensional (3D) architecture of stacked DRAM. According to the JEDEC mobile memory technology roadmap, the interface of 3D DRAM, including the Wide I/O and High-Bandwidth Memory (HBM), is mainly classified as channel-based memories. In this paper, we propose a built-off self-test (BOSR) scheme at the controller level for channel-based 3D memory to enhance final product yield after the bonding of a memory cube to its corresponding logic die. The logic die contains the Channel controller, in which the BOSR circuit resides. Experimental results show that the repair rate is high with higher cluster failure ratio due to the flexible algorithm we choose. The area overhead is low and it decreases significantly when the memory size or channel count increases. The performance penalty is also low due to the parallel execution of address comparison and repair. Moreover, the manufacture cost is lower than conventional DRAM architecture due to allocator-based redundancies. Finally, the proposed scheme can easily be applied to other channel-based 3D memories.

UR - http://www.scopus.com/inward/record.url?scp=85028987513&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85028987513&partnerID=8YFLogxK

U2 - 10.1109/TC.2017.2667645

DO - 10.1109/TC.2017.2667645

M3 - Article

AN - SCOPUS:85028987513

VL - 66

SP - 1293

EP - 1301

JO - IEEE Transactions on Computers

JF - IEEE Transactions on Computers

SN - 0018-9340

IS - 8

M1 - 7850958

ER -

Liu HH, Lin BY, Wu CW, Chiang WT, Mincent L, Lin HC 等. A Built-Off Self-Repair Scheme for Channel-Based 3D Memories. IEEE Transactions on Computers. 2017 8月 1;66(8):1293-1301. 7850958. https://doi.org/10.1109/TC.2017.2667645