TY - JOUR

T1 - A class of efficient quantum incrementer gates for quantum circuit synthesis

AU - Li, Xiaoyu

AU - Yang, Guowu

AU - Torres, Carlos Manuel

AU - Zheng, Desheng

AU - Wang, Kang L.

N1 - Funding Information:
We would like to thank Selman Hershfield and Fengbo Ren for stimulating discussions. This work is supported by the Fundamental Research Funds for the Central Universities under Grant No. ZYGX2011YB022, and in part by the National Science Foundation of China under Grant Nos. 61272175 and 60773205.

PY - 2014/1/10

Y1 - 2014/1/10

N2 - The quantum incrementer is one of the simplest quantum operators, which exhibits basic arithmetic operations such as addition, the propagation of carry qubits and the resetting of carry qubits. In this paper, three quantum incrementer gate circuit topologies are derived and compared based upon their total number of gates, the complexity of the circuits, the types of gates used and the number of carry or ancilla qubits implemented. The first case is a generalized n-qubit quantum incrementer gate with the notation of (n:0). Two other quantum incrementer topologies are proposed with the notations of (n:n-1:RE) and (n:n-1:RD). A general method is derived to decompose complicated quantum circuits into simpler quantum circuits which are easier to manage and physically implement. Due to the cancelation of intermediate unitary gates, it is shown that adding ancilla qubits slightly increases the complexity of a given circuit by the order of 3n, which pales in comparison to the complexity of the original circuit of the order n2 without reduction. Finally, a simple application of the generalized n-qubit quantum incrementer gate is introduced, which is related to quantum walks.

AB - The quantum incrementer is one of the simplest quantum operators, which exhibits basic arithmetic operations such as addition, the propagation of carry qubits and the resetting of carry qubits. In this paper, three quantum incrementer gate circuit topologies are derived and compared based upon their total number of gates, the complexity of the circuits, the types of gates used and the number of carry or ancilla qubits implemented. The first case is a generalized n-qubit quantum incrementer gate with the notation of (n:0). Two other quantum incrementer topologies are proposed with the notations of (n:n-1:RE) and (n:n-1:RD). A general method is derived to decompose complicated quantum circuits into simpler quantum circuits which are easier to manage and physically implement. Due to the cancelation of intermediate unitary gates, it is shown that adding ancilla qubits slightly increases the complexity of a given circuit by the order of 3n, which pales in comparison to the complexity of the original circuit of the order n2 without reduction. Finally, a simple application of the generalized n-qubit quantum incrementer gate is introduced, which is related to quantum walks.

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U2 - 10.1142/S0217979213501919

DO - 10.1142/S0217979213501919

M3 - Article

AN - SCOPUS:84890557506

VL - 28

JO - International Journal of Modern Physics B

JF - International Journal of Modern Physics B

SN - 0217-9792

IS - 1

M1 - 1350191

ER -