TY - JOUR
T1 - A compact dynamic-performance-improved current-steering DAC with random rotation-based binary-weighted selection
AU - Lin, Wei Te
AU - Kuo, Tai Haur
PY - 2012/2/1
Y1 - 2012/2/1
N2 - Conventional binary-weighted current-steering DACs are generally operated with current groups where each group is binary-weighted and formed with predetermined members of a unit current-source array. This paper proposes a random rotation-based binary-weighted selection (RRBS) that efficiently performs dynamic-element matching (DEM) by randomly rotating the sequence of these units to form new binary-weighted current groups for each DAC output. Without using binary-to-thermometer decoders, RRBS features its simplicity and compactness of DEM realization. Compared to conventional binary-weighted DACs, RRBS DACs are insensitive to the mismatch of small-size current-sources and exhibit better dynamic performance. A 10-bit RRBS DAC is implemented with only 0.034 mm 2 in a standard 1P6M 1.8 V 0.18 μm CMOS process. Measured performance achieves >61 dB spurious-free dynamic range (SFDR) in the Nyquist bandwidth with 500 MS/s, while its active area is less than one-tenth of that required by state-of-the-art 10-bit current steering DACs. To the best of our knowledge, the proposed RRBS implements the smallest area for high-speed current-steering DACs up to now. Its SFDR is also comparable to that of 12-bit published designs. Three popular figures-of-merit (FOMs) are used to compare this design with other state-of-the-art 10-12-bit DACs, with the proposed design performing best with 2 FOMs.
AB - Conventional binary-weighted current-steering DACs are generally operated with current groups where each group is binary-weighted and formed with predetermined members of a unit current-source array. This paper proposes a random rotation-based binary-weighted selection (RRBS) that efficiently performs dynamic-element matching (DEM) by randomly rotating the sequence of these units to form new binary-weighted current groups for each DAC output. Without using binary-to-thermometer decoders, RRBS features its simplicity and compactness of DEM realization. Compared to conventional binary-weighted DACs, RRBS DACs are insensitive to the mismatch of small-size current-sources and exhibit better dynamic performance. A 10-bit RRBS DAC is implemented with only 0.034 mm 2 in a standard 1P6M 1.8 V 0.18 μm CMOS process. Measured performance achieves >61 dB spurious-free dynamic range (SFDR) in the Nyquist bandwidth with 500 MS/s, while its active area is less than one-tenth of that required by state-of-the-art 10-bit current steering DACs. To the best of our knowledge, the proposed RRBS implements the smallest area for high-speed current-steering DACs up to now. Its SFDR is also comparable to that of 12-bit published designs. Three popular figures-of-merit (FOMs) are used to compare this design with other state-of-the-art 10-12-bit DACs, with the proposed design performing best with 2 FOMs.
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U2 - 10.1109/JSSC.2011.2168651
DO - 10.1109/JSSC.2011.2168651
M3 - Article
AN - SCOPUS:84856497565
VL - 47
SP - 444
EP - 453
JO - IEEE Journal of Solid-State Circuits
JF - IEEE Journal of Solid-State Circuits
SN - 0018-9200
IS - 2
M1 - 6059519
ER -