A current-mode DC-DC buck converter with efficiency-optimized frequency control and reconfigurable compensation

Jia Ming Liu, Pai Yi Wang, Tai Haur Kuo

研究成果: Article

43 引文 斯高帕斯(Scopus)

摘要

Large input voltage range and wide output current range are usually needed for dc-dc converters. For these input and output conditions, the converter's efficiency can be maximized by a proposed method, efficiency-optimized switching-frequency (EOF) control. The optimal switching frequency for maximizing the efficiency is generated by the low-complexity and low-power EOF generator. A reconfigurable compensator is developed for improving the load regulation and the transient response. A piecewise-linear current sensor (PLCS) is employed to reduce controller power loss without sacrificing the sensing accuracy. With the aforementioned three proposed methods, a monolithic current-mode dc-dc buck converter is implemented in a 0.35-μm 3.3-V CMOS process. The measured power-loss reductions and efficiency improvements achieve 16 and 15mW, and 16% and 1%, both in light and heavy loads, respectively. The load regulation and the transient recovery time are improved by 40 mV and 12 μs, respectively, while the PLCS can reduce 3mW of power loss. Compared with other published converters in 0.35-μm CMOS process, the implemented converter achieves a higher efficiency of 96.3% and smaller chip area of 0.97mm 2.

原文English
文章編號5954187
頁(從 - 到)869-880
頁數12
期刊IEEE Transactions on Power Electronics
27
發行號2
DOIs
出版狀態Published - 2012 一月 16

    指紋

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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