This paper presents a comprehensive analysis of a current-mode-logic frequency divider (CML FD) and the theoretical locking range of CML FD. The locking range of the CML divider is proportional to the injection ratio. By adding a resistive load, the locking range of the CML divider is not limited by the Q value of the LC resonant circuit. The minimum input power to drive the divider is achieved when the output frequency is equal to the self-oscillation frequency. To verify the properties of wideband and multi-phase outputs, the ÷4 octet-phase frequency divider based on a two-stage CML FD was implemented using a 0.18 μm CMOS process. It has a locking range of 1GHz to 8GHz with a 12.6mW dc power consumption, and the phase deviation between the octet output signals is less than 4.7°. With an ultra-wide frequency bandwidth and accurate octet outputs, the proposed divider is suitable for multi-phase generator applications.
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