A digital peak current delay compensation for primary-side regulation flyback adapter

Chun Ping Niou; Chien Hung Tsai; Ta Jin Chen

doi:10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter

Chun Ping Niou, Chien Hung Tsai, Ta Jin Chen

電機工程學系

研究成果: Conference contribution

8 引文斯高帕斯（Scopus）

摘要

A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

原文	English
主出版物標題	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	1-4
頁數	4
ISBN（電子）	9781538642603
DOIs	https://doi.org/10.1109/VLSI-DAT.2018.8373260
出版狀態	Published - 2018 6月 5
事件	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 - Hsinchu, Taiwan 持續時間: 2018 4月 16 → 2018 4月 19

出版系列

名字	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

Other

Other	2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018
國家/地區	Taiwan
城市	Hsinchu
期間	18-04-16 → 18-04-19

All Science Journal Classification (ASJC) codes

安全、風險、可靠性和品質
控制和優化
硬體和架構
電氣與電子工程

存取文件

10.1109/VLSI-DAT.2018.8373260

其它文件與鏈接

引用此

Niou, C. P., Tsai, C. H., & Chen, T. J. (2018). A digital peak current delay compensation for primary-side regulation flyback adapter. 於 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 (頁 1-4). (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT.2018.8373260

Niou, Chun Ping ; Tsai, Chien Hung ; Chen, Ta Jin. / A digital peak current delay compensation for primary-side regulation flyback adapter. 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. 頁 1-4 (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018).

@inproceedings{3f35b064f7a6405aa33874582457c051,

title = "A digital peak current delay compensation for primary-side regulation flyback adapter",

abstract = "A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.",

author = "Niou, {Chun Ping} and Tsai, {Chien Hung} and Chen, {Ta Jin}",

note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018 ; Conference date: 16-04-2018 Through 19-04-2018",

year = "2018",

month = jun,

day = "5",

doi = "10.1109/VLSI-DAT.2018.8373260",

language = "English",

series = "2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "1--4",

booktitle = "2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018",

address = "United States",

}

Niou, CP, Tsai, CH & Chen, TJ 2018, A digital peak current delay compensation for primary-side regulation flyback adapter. 於 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018, Institute of Electrical and Electronics Engineers Inc., 頁 1-4, 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018, Hsinchu, Taiwan, 18-04-16. https://doi.org/10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter. / Niou, Chun Ping; Tsai, Chien Hung; Chen, Ta Jin.
2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc., 2018. p. 1-4 (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018).

研究成果: Conference contribution

TY - GEN

T1 - A digital peak current delay compensation for primary-side regulation flyback adapter

AU - Niou, Chun Ping

AU - Tsai, Chien Hung

AU - Chen, Ta Jin

PY - 2018/6/5

Y1 - 2018/6/5

N2 - A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

AB - A digital control primary-side regulation (PSR) flyback adapter with peak current delay compensation technique is proposed. In USB type adapters, over-current protection (OCP) or constant current (CC) control is used to protect the system. However, there is a primary-side peak current detection error caused by the propagation delay in control circuits, which makes the OCP and CC control incorrect. This paper proposes a digital method named as two-cycle-averaged compensation to solve current variation caused by the propagation delay. This work can reduce the cost of digital hardware, and without losing the compensation effect. The output current accuracy measurement result of this work is smaller than 2.8%.

UR - http://www.scopus.com/inward/record.url?scp=85049309279&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85049309279&partnerID=8YFLogxK

U2 - 10.1109/VLSI-DAT.2018.8373260

DO - 10.1109/VLSI-DAT.2018.8373260

M3 - Conference contribution

AN - SCOPUS:85049309279

T3 - 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

SP - 1

EP - 4

BT - 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018

Y2 - 16 April 2018 through 19 April 2018

ER -

Niou CP, Tsai CH, Chen TJ. A digital peak current delay compensation for primary-side regulation flyback adapter. 於 2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018. Institute of Electrical and Electronics Engineers Inc. 2018. p. 1-4. (2018 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2018). doi: 10.1109/VLSI-DAT.2018.8373260

A digital peak current delay compensation for primary-side regulation flyback adapter

摘要

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Other

All Science Journal Classification (ASJC) codes

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