A digitally calibrated transconductor for high-speed operation with its linearity enhanced by negative feedback is proposed. This voltage-to-current converter is mainly composed of two parts: an operational transconductance amplifier (OTA) and a pair of feedback resistors. The measured spurious free dynamic range (SFDR) of the transconductor is 72.6 dB when the input frequency is 100 MHz. To compensate common-mode deviation due to process variation, digital calibration circuits are added. Fabricated in TSMC 0.13-μm CMOS process, the transconductor occupies 250 × 200 μm2 active area and consumes 5.06 mW from a 1.2-V supply.
|出版狀態||Published - 2006 12月 1|
|事件||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China|
持續時間: 2006 11月 13 → 2006 11月 15
|Other||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006|
|期間||06-11-13 → 06-11-15|
All Science Journal Classification (ASJC) codes