A divide-by-four transformer-coupled regenerative frequency divider with quadrature outputs

Yu Sheng Lin, Cheng Han Wu, Chun Lin Lu, Yeong Her Wang

研究成果: Article同行評審

6 引文 斯高帕斯(Scopus)

摘要

A divide-by-four transformer-coupled regenerative frequency divider implemented by a TSMC 90 nm CMOS process is presented. A transformer-coupling technique and a source-injected current-mode-logic divider were proposed to increase the injection signal level and widen the operation range of the loop divider. A subharmonic mixer with bottom-switching pairs was used to reduce dc power consumption and optimize the conversion gain. The divider core consumes 6.8 mW at 1.2 V supply voltage. Without using the tuning techniques, the measured locking range is 4.7 GHz (20.9%) from 20.1 to 24.8 GHz. The phase deviation of the quadrature output is less than 0.77̂.

原文English
文章編號6712920
頁(從 - 到)260-262
頁數3
期刊IEEE Microwave and Wireless Components Letters
24
發行號4
DOIs
出版狀態Published - 2014 四月

All Science Journal Classification (ASJC) codes

  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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