A Gated-Diode ESD SCR-Incorporated BJT for Reversed Floating P+Junction Modulation

Chih Yao Huang; Quo Ker Chen; Ji Fan Chi; Tzuen Hsi Huang

doi:10.1109/TDMR.2021.3050520

A Gated-Diode ESD SCR-Incorporated BJT for Reversed Floating P⁺Junction Modulation

Chih Yao Huang, Quo Ker Chen, Ji Fan Chi, Tzuen Hsi Huang

電機工程學系

研究成果: Article › 同行評審

摘要

This work presents a novel gated- diode SCR-incorporated BJT (SIB) structure for ESD protection purpose. A gated diode built in the SIB structure modulates reverse-biased P+ / N-well diode for better junction breakdown control. This device could achieve high TLP second breakdown current /ESD threshold close to that of an SCR, very high holding voltage, and reduced trigger voltage, as well as excellent latchup immunity.

原文	English
文章編號	11
頁（從 - 到）	64-69
頁數	6
期刊	IEEE Transactions on Device and Materials Reliability
卷	21
發行號	1
DOIs	https://doi.org/10.1109/TDMR.2021.3050520
出版狀態	Published - 2021 三月

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Safety, Risk, Reliability and Quality
Electrical and Electronic Engineering

存取文件

10.1109/TDMR.2021.3050520

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note = "Funding Information: This work was supported by the Ministry of Science and Technology, Taiwan, under Grant MOST108-2221-E-231-002. Publisher Copyright: {\textcopyright} 2020 IEEE. Copyright: Copyright 2021 Elsevier B.V., All rights reserved.",

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