A high gain, low noise wlan receiver for dual if double downconversion application in 90-nm RF CMOS

Chieh Pin Chang, Jian An Hou, Jionguang Su, Ja Hao Chen, Chih Wei Chen, Tsyr Shyang Liou, Shyh Chyi Wong, Yeong Her Wang

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

A high power gain, low noise WLAN receiver, using a 158 GHz fT 90-nm RF CMOS technology for dual IF double downconversion system-in-package application is demonstrated. The proposed circuit could improve the design flexibility of back-end stages due to its high power gain and low noise performances. The LNA and Mixer are biased at 1 V with 12.9 mA and 1.8 V with 5.5 mA, respectively. The proposed circuit delivers the double-sideband noise figure of 2.68 dB, conversion gain of 36.24 dB, IIP3 of -25 dBm, IIP2 of 21.1 dBm, and LO-IF isolation of -56.2 dB under the 1 dBm LO power, while maintaining the RF port and IF port return losses below -12.9 and -18.7 dB, respectively.

原文English
頁(從 - 到)2422-2425
頁數4
期刊Microwave and Optical Technology Letters
49
發行號10
DOIs
出版狀態Published - 2007 10月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 原子與分子物理與光學
  • 凝聚態物理學
  • 電氣與電子工程

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