A high-performance bidirectional architecture for the quasi-comparison-free sorting algorithm

Wei Ting Chen, Ren Der Chen, Pei Yin Chen, Yu Che Hsiao

研究成果: Article同行評審

4 引文 斯高帕斯(Scopus)

摘要

This paper proposes a high-performance bidirectional architecture for the quasi-comparison-free sorting algorithm. Our architecture improves the performance of the conventional unidirectional architecture by reducing the total number of sorting cycles via bidirectional sorting along with two auxiliary methods. Bidirectional sorting allows the sorting tasks to be conducted concurrently in the high-and low-index parts of our architecture. The first auxiliary method is boundary finding, which shortens the range for index searching by finding the boundaries of the range. The second auxiliary method is queue storing, which stores each useful index in a queue in advance to reduce the number of miss cycles during index searching. The performance of our architecture highly depends on the distribution of input data. For each set of input data to be sorted, five Gaussian distributions of the input data and four standard derivations for each distribution were adopted in our experiments. The results show that at the expense of some additional area cost, the number of sorting cycles and the energy consumption are significantly reduced by our method.

原文English
文章編號9324938
頁(從 - 到)1493-1506
頁數14
期刊IEEE Transactions on Circuits and Systems I: Regular Papers
68
發行號4
DOIs
出版狀態Published - 2021 4月

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程
  • 硬體和架構

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