TY - JOUR
T1 - A low-cost diagnosis methodology for pipelined A/D converters
AU - Huang, Chih Haur
AU - Lee, Kuen Jong
AU - Chang, Soon Jyh
PY - 2004/12/1
Y1 - 2004/12/1
N2 - Pipelined A/D Converters have intrinsic high-speed characteristics and are widely used in wideband communication and video systems. In this paper, we propose a low-cost diagnosis methodology for pipelined A/D converters which employs three techniques in the diagnosis process: (1) time-division- multiplexing (TDM), (2) scan based testing, and (3) VCO based measurement. The last technique is developed to diagnose the most critical mixed-signal functional blocks in the pipelined ADC including the sample-and-hold amplifier (SHA) and the digital-to-analog sub-converters (DASC). It provides a great capability to distinct signals with very small voltage difference and is insensitive to process variations and immune to noise induced errors. The diagnosis methodology is power- and area- efficient because it only needs low-complexity and low-area BIST circuits to accomplish the full diagnosis process. A 12-bit pipelined A/D converter with the proposed diagnosis scheme is designed and simulated using the TSMC 0.25um 1P5M technology to demonstrate the effectiveness of the proposed methodology.
AB - Pipelined A/D Converters have intrinsic high-speed characteristics and are widely used in wideband communication and video systems. In this paper, we propose a low-cost diagnosis methodology for pipelined A/D converters which employs three techniques in the diagnosis process: (1) time-division- multiplexing (TDM), (2) scan based testing, and (3) VCO based measurement. The last technique is developed to diagnose the most critical mixed-signal functional blocks in the pipelined ADC including the sample-and-hold amplifier (SHA) and the digital-to-analog sub-converters (DASC). It provides a great capability to distinct signals with very small voltage difference and is insensitive to process variations and immune to noise induced errors. The diagnosis methodology is power- and area- efficient because it only needs low-complexity and low-area BIST circuits to accomplish the full diagnosis process. A 12-bit pipelined A/D converter with the proposed diagnosis scheme is designed and simulated using the TSMC 0.25um 1P5M technology to demonstrate the effectiveness of the proposed methodology.
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M3 - Conference article
AN - SCOPUS:13244291303
SN - 1081-7735
SP - 296
EP - 301
JO - Proceedings of the Asian Test Symposium
JF - Proceedings of the Asian Test Symposium
T2 - Proceedings of the Asian Test Symposium, ATS'04
Y2 - 15 November 2004 through 17 November 2004
ER -