A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Chih Yuan Lien, Chi Huan Tang, Pei Yin Chen, Yao Tsung Kuo, Yue Ling Deng

研究成果: Article同行評審

19 引文 斯高帕斯(Scopus)

摘要

In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficient quantization method is applied to reduce the size of required look up tables. The experimental results show that the proposed architecture is cost efficient while maintaining the same image quality, frame rate and working clock frequency.

原文English
文章編號9051724
頁(從 - 到)64278-64283
頁數6
期刊IEEE Access
8
DOIs
出版狀態Published - 2020

All Science Journal Classification (ASJC) codes

  • 一般電腦科學
  • 一般材料科學
  • 一般工程

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