A Low Power Readout Circuit for a Tri-axial Piezoelectric MEMS Accelerometer

Sin Yu Ciou, Soon Jyh Chang

研究成果: Conference contribution

摘要

This paper presents a low power readout circuit for a tri-axial piezoelectric MEMS accelerometer. The readout circuit is composed of a successive approximation register (SAR) analog-to-digital converter (ADC) and an analog front-end, including transimpedance amplifier (TIA), low-pass filter and notch filter. The proposed TIA converts the sensed current signals into voltage signals, which is amplified and filtered in the later stages. The sample-and-hold circuit of the SAR ADC is replaced with the proposed simultaneous sampling circuit to reserve the correlation of the tri-axial signals. It not only saves the chip area but also reduces the loading of the previous stage. The proof-of-concept prototype was fabricated in TSMC 0.18- μ m CMOS technology. At a 1.8-V supply and 100-kS/s sampling rate, the readout circuit consumes 0.196 mW and achieves the sensing range of ±10 g with the sensitivity of 173.43 mV/g and the nonlinearity of 0.43%. The readout core occupies an area of 3.65 mm2.

原文English
主出版物標題2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
發行者Institute of Electrical and Electronics Engineers Inc.
ISBN(電子)9798350334166
DOIs
出版狀態Published - 2023
事件2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, Taiwan
持續時間: 2023 4月 172023 4月 20

出版系列

名字2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
國家/地區Taiwan
城市Hsinchu
期間23-04-1723-04-20

All Science Journal Classification (ASJC) codes

  • 人工智慧
  • 電腦網路與通信
  • 電腦科學應用
  • 硬體和架構
  • 資訊系統
  • 電氣與電子工程

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