An ultra-low voltage adaptive Sigma-Delta Analog-to-Digital Converter (SDADC) with a 10-bit dynamic range for biomicrosystem applications is presented. The proposed SDADC includes a Switched-current Sigma-Delta Modulator (SISDM) and a digital decimator. Moreover, a new single-multiplier structure is presented to implement the Finite Impulse Response (FIR) digital filters which are the major hardware elements in the decimator. Measurement results show that the SISDM has a dynamic range over 60dB and a power consumption of 180μW with an input signal of 1.25kHz sinusoid wave and 5kHz bandwidth under a single 0.8V power supply for ENG signals. Besides, the post layout simulations of SDADC including SISDM and decimator reveal that the dynamic range is still over 60dB without harming by digital circuits.
|出版狀態||Published - 2006 12月 1|
|事件||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006 - Hangzhou, China|
持續時間: 2006 11月 13 → 2006 11月 15
|Other||2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006|
|期間||06-11-13 → 06-11-15|
All Science Journal Classification (ASJC) codes