A low voltage and low ground current low-dropout regulator with transient enhanced circuit for SoC

Jia Hui Wang, Sheng Wen Lai, Chun Sheng Huang, Chien Hung Tsai

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

The design of a low voltage and low ground current low-dropout voltage regulator (LDO) with transient enhanced circuit (TEC) for system-on-ship (SoC) application was presented. The TEC consists of the two comparator and two auxiliary transistors. The comparators sense the variation of load current; moreover, it can control the auxiliary transistors to push or pull the gate voltage of power transistor to achieve fast transient. On the other hand, the auxiliary transistors work in cut-off region to reduce the power consume in the stable state. Therefore, the proposed LDO achieves low ground current and fast transient function. In addition, the minimum output-current required down to 100μA by Q-reduction technique. The 1V capacitor-less LDO voltage regulator with a power supply of 1.2V was fabricated in 0.35μm CMOS technology, consuming only 18μA of ground current with a dropout voltage of 200mV.

原文English
主出版物標題1st International Conference on Green Circuits and Systems, ICGCS 2010
發行者IEEE Computer Society
頁面428-431
頁數4
ISBN(列印)9781424468775
DOIs
出版狀態Published - 2010
事件1st International Conference on Green Circuits and Systems, ICGCS 2010 - Shanghai, China
持續時間: 2010 6月 212010 6月 23

出版系列

名字1st International Conference on Green Circuits and Systems, ICGCS 2010

Other

Other1st International Conference on Green Circuits and Systems, ICGCS 2010
國家/地區China
城市Shanghai
期間10-06-2110-06-23

All Science Journal Classification (ASJC) codes

  • 硬體和架構
  • 電氣與電子工程

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