A model for underfill viscous flow considering the resistance induced by solder bumps

Chyi Lang Lai, Wen Bin Young

研究成果: Article同行評審

11 引文 斯高帕斯(Scopus)

摘要

During the underfill process, polymers driven by either capillary force or external pressure are filled at a low speed between the chip and substrate. Current methods treated the flow in the chip cavity as a laminar flow between parallel plates, which ignored the resistance induced by the solder bumps or other obstructions. In this study, the filling flow between solder bumps was simulated by a flow through a porous media. By using the superposition of flows through parallel plates and series of rectangular ducts, permeability of the underfill flow was fully characterized by the geometric arrangement of solder bumps and flat chips. The flow resistances caused by adjacent bumps were represented in its permeability. The model proposed in this study could provide a numerical approach to approximate and simulate the undefill process for flip-chip technology. Although the proposed model is applicable for any geometric arrangement of solder bumps, rectangulararray of solder bumps layout was used first for comparison with experimental results of other article. Comparisons of the flow-front shapes and filling time with the experimental data indicated that the flow simulation obtained from the proposed model gave a good prediction for the underfill flow.

原文English
頁(從 - 到)186-194
頁數9
期刊Journal of Electronic Packaging, Transactions of the ASME
126
發行號2
DOIs
出版狀態Published - 2004 6月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 材料力學
  • 電腦科學應用
  • 電氣與電子工程

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