A Multi-Stage Fault-Tolerant Multiplier with Triple Module Redundancy (TMR) Technique

Ping-Yeh Yin, Yuan Ho Chen, Chih Wen Lu, Shian Shing Shyu, Chung Lin Lee, Ting-Chia Ou, Yo Sheng Lin

研究成果: Conference contribution

10 引文 斯高帕斯(Scopus)
原文English
主出版物標題proc. 4th International Conference on Intelligent Systems Modelling & Simulation (ISMS)
出版地Bangkok, Thailand
出版狀態Published - 2013 1月

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