A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs

Jianwei Zhang, Yizheng Ye, Binda Liu

研究成果: Conference contribution

8 引文 斯高帕斯(Scopus)

摘要

A new mismatch-dependent low-power technique is presented for content-addressable memories (CAMs). With a novel shadow match-line voltage-detecting scheme, the word circuits realize fast self-disable of the charging paths in case of mismatches. Since the majority of CAMs words are mismatched, a significant power is reduced with a high search speed. Simulation results show the proposed 256-word × 144-bit ternary CAM, using 0.13-μm 1.2-V CMOS process, achieves 0.51 fJ/bitsearch for the word circuit with less than 900 ps search time. The achievement illustrates a 77% energy-delay-product (EDP) reduction as compared to the speedoptimized current-saving scheme.

原文English
主出版物標題ISLPED'06 - Proceedings of the 2006 International Symposium on Low Power Electronics and Design
頁面135-138
頁數4
DOIs
出版狀態Published - 2006
事件ISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design - Tegernsee, Bavaria, Germany
持續時間: 2006 10月 42006 10月 6

出版系列

名字Proceedings of the International Symposium on Low Power Electronics and Design
2006
ISSN(列印)1533-4678

Other

OtherISLPED'06 - 11th ACM/IEEE International Symposium on Low Power Electronics and Design
國家/地區Germany
城市Tegernsee, Bavaria
期間06-10-0406-10-06

All Science Journal Classification (ASJC) codes

  • 一般工程

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