This brief presents a novel high-speed low-cost comparison-free, 1D bit-level median filter. The filter can be customized by cascading different median units. The most prominent point is that a pre-set value is used during the process, and the partial median can be easily identified by observing the MSB. Therefore, the median can be obtained without any comparators. With this feature, the area cost drops significantly while the operating speed remains the same. The results show that when synthesized using TSMC 90nm CMOS process technology, our design can achieve 2000MHz, and the area cost is reduced by 15.72% as compared to a state-of-the-art design.
|頁（從 - 到）||1329-1333|
|期刊||IEEE Transactions on Circuits and Systems II: Express Briefs|
|出版狀態||Published - 2020 七月|
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering