A novel localized-trapped-charge-induced threshold voltage model for double-fin multi-channel FETs (DFMcFETs)

Hong Wun Gao, Yeong Her Wang, Te Kuang Chiang

研究成果: Article同行評審

1 引文 斯高帕斯(Scopus)

摘要

With the effects of localized trapped charges on the flat-band voltage, a novel localized-trapped-chargeinduced threshold voltage model for the double-fin multi-channel FET (DFMcFET) is presented based on the quasi-3-D scaling equation and minimum bottom-central potential. It is shown that the deep trench of the DFMcFET is superior to the shallow one in respect of reducing the localized-trapped-charge-induced threshold voltage degradation (LTTVD). Besides, the low drain voltage Vds, the low trapped charge density Nf , the small damaged zone near the drain side Ls and the thin gate oxide tox are required to resist LTTVD as the normalized damaged zone is increased. The LTTVD can be well controlled by the scaling theory. With the fixed damaged zone and trapped charge density, the allowable minimum channel length can be uniquely determined according to the criterion of scaling factor. In comparison to the conventional FinFET, DFMcFET not only provides more conducting channel, but also suffers less threshold voltage degradation caused by the short-channel effects irrespective of trapped charge polarity. With its computational efficiency and simple form, the model can be easily used for the circuit application for DFMcFET.

原文English
文章編號7855657
頁(從 - 到)291-297
頁數7
期刊IEEE Transactions on Device and Materials Reliability
17
發行號2
DOIs
出版狀態Published - 2017 六月

All Science Journal Classification (ASJC) codes

  • 電子、光磁材料
  • 安全、風險、可靠性和品質
  • 電氣與電子工程

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