A novel post-linearization technique for fully integrated 5.5 GHz high-linearity LNA

Chieh Pin Chang, Ja Hao Chen, Shih Han Hung, Chun Chi Su, Yeong Her Wang

研究成果: Conference contribution

10 引文 斯高帕斯(Scopus)

摘要

A novel post-linearization technique for fully integrated 5.5 GHz high-linearity LNA, implemented through a 0.18 μm RF CMOS technology, is demonstrated. The post-linearization technique adopts a folded cascode diode with a resistor and a capacitor in parallel as a third-order intermodulation distortion (IMD3) sinker. The LNA with the post-linearization technique has a +8.33 dBm IIP3, a power gain of 10.02 dB, and a noise figure of 3.05 dB, while consuming 6 mA from a supply voltage of 1.8 V. Comparison with the characteristics of the LNA without using post-linearization technique, the IIP3 is improved 6.21 dB, and the IMD3 can be reduced 12.77 dB. Moreover, the performances of noise figure and power consumption rise 0.09 dB and 0.08 mW, and the power gain lowers 0.3 dB after using the technique only. This technique indeed improves the linearity performance without obvious effects.

原文English
主出版物標題2009 4th International Conference on Innovative Computing, Information and Control, ICICIC 2009
頁面577-580
頁數4
DOIs
出版狀態Published - 2009 12月 1
事件2009 4th International Conference on Innovative Computing, Information and Control, ICICIC 2009 - Kaohsiung, Taiwan
持續時間: 2009 12月 72009 12月 9

出版系列

名字2009 4th International Conference on Innovative Computing, Information and Control, ICICIC 2009

Other

Other2009 4th International Conference on Innovative Computing, Information and Control, ICICIC 2009
國家/地區Taiwan
城市Kaohsiung
期間09-12-0709-12-09

All Science Journal Classification (ASJC) codes

  • 計算機理論與數學
  • 電腦網路與通信
  • 軟體

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