A Novel Three-Dimensional 6T-SRAM Cell Featuring Vertical Transistors and 24F2Layout Area

Darsen D. Lu, I. Hsuan Chen

研究成果: Conference contribution

摘要

A novel three-dimensional structure for 6-transistor static random access memory (SRAM) cell composed of vertical gate-all-around transistors is proposed. A three-layer design for the cell is laid out with an area of 24F2, which is multiple times denser than conventional cell design. Significant cost-per-function benefits are thus expected. Buried power rail design facilitates routing in the ultra-compact cell. A novel monolithic process sequence to realize the cell utilizes 9 masks, somewhat increasing processing cost as compared to two-dimensional SRAM. The vertical gate-all-around transistor may either have conventional junction or junctionless design, the latter implying simpler fabrication process. Reasonable cell characteristics is demonstrated with TCAD simulation down to a supply voltage of 0.5V.

原文English
主出版物標題2021 7th International Conference on Applied System Innovation, ICASI 2021
編輯Shoou-Jinn Chang, Sheng-Joue Young, Artde Donald Kin-Tak Lam, Liang-Wen Ji, Stephen D. Prior
發行者Institute of Electrical and Electronics Engineers Inc.
頁面88-90
頁數3
ISBN(電子)9781665441438
DOIs
出版狀態Published - 2021 9月 24
事件7th International Conference on Applied System Innovation, ICASI 2021 - Alishan, Chiayi, Taiwan
持續時間: 2021 9月 242021 9月 25

出版系列

名字2021 7th International Conference on Applied System Innovation, ICASI 2021

Conference

Conference7th International Conference on Applied System Innovation, ICASI 2021
國家/地區Taiwan
城市Alishan, Chiayi
期間21-09-2421-09-25

All Science Journal Classification (ASJC) codes

  • 人工智慧
  • 電腦網路與通信
  • 電腦科學應用
  • 訊號處理
  • 能源工程與電力技術
  • 電氣與電子工程
  • 儀器

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