摘要
A fracture mechanics based numerical approach is developed for modeling delamination growth on materials interfaces in integrated circuit (IC) interconnects. In this approach, the heterogeneous interconnect structures neighboring the cracked interface are approximated by homogenized layers with transversely isotropic elastic properties. Evolution of the interface crack under fatigue condition is modeled by using an incremental approach, in which the fracture mechanics parameters including the strain energy release rate, the normalized stress intensity factors and phase angles are first estimated by post-processing finite element solutions. The fracture mechanics parameters along the curvilinear front of the interface crack are then substituted into a steady-state fatigue crack growth model for obtaining the crack growth increments. The process is repeated to simulate subsequent crack growth for predicting interconnect structural reliability under fatigue condition. The evolution of an interface corner crack in a back-end-of-line (BEOL) Cu/low-k interconnect structure under temperature cycling condition is considered as an application example of the procedure.
| 原文 | English |
|---|---|
| 頁(從 - 到) | 1464-1474 |
| 頁數 | 11 |
| 期刊 | Microelectronics Reliability |
| 卷 | 52 |
| 發行號 | 7 |
| DOIs | |
| 出版狀態 | Published - 2012 7月 |
All Science Journal Classification (ASJC) codes
- 電子、光磁材料
- 原子與分子物理與光學
- 凝聚態物理學
- 安全、風險、可靠性和品質
- 表面、塗料和薄膜
- 電氣與電子工程
指紋
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