A pipeline ADC with latched-based ring amplifiers

Wen Tze Chen, Ya Ting Shyu, Chun Po Huang, Soon Jyh Chang

研究成果: Conference contribution

7 引文 斯高帕斯(Scopus)

摘要

In comparison with conventional operational amplifier, ring amplifier can achieve better power efficiency for switched capacitor circuits. However, the cascade-inverter architecture of ring amplifier may suffer from undesirable oscillation which has a great impact on transient stability. This paper presents a latched-based ring amplifier which is capable of decreasing the probability of oscillation. Besides, two auto-zero schemes are employed in different pipelined stages to reduce the common-mode voltage offset and to increase the stability. The prototype ADC was fabricated in a 90-nm CMOS technology. The measured SNDR and SFDR are 52.06 dB and 63. 15 dB, respectively, for a Nyquist frequency input sampled at 35 MS/s, and the ADC consumes 3.65 mW.

原文English
主出版物標題ISCAS 2016 - IEEE International Symposium on Circuits and Systems
發行者Institute of Electrical and Electronics Engineers Inc.
頁面85-88
頁數4
ISBN(電子)9781479953400
DOIs
出版狀態Published - 2016 七月 29
事件2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
持續時間: 2016 五月 222016 五月 25

出版系列

名字Proceedings - IEEE International Symposium on Circuits and Systems
2016-July
ISSN(列印)0271-4310

Other

Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
國家/地區Canada
城市Montreal
期間16-05-2216-05-25

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

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