A pipelined IP forwarding engine with fast update

Yeim Kuan Chang, Yen Cheng Liu, Fang Chen Kuo

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

IP address lookup is one of the most important functionalities in the router design. To meet the requirements in high speed routers consisting of linecards with 40Gbps transfer rates, researchers usually take lookup/update speed, storage requirement, and scalability into consideration when designing a high performance forwarding engine. As a result, hardwarebased solutions are often used to develop a high speed router nowadays. In this paper, we develop a FPGAbased pipelined forwarding engine which focuses on reducing the update overhead. The proposed scheme partitions the routing table into several disjoint groups. The prefix which resides in the same group is interleaving stored into several memory modules to ensure the parallel comparison at the comparison stage. With the pipeline enabled, the throughput of the design can achieve the speed of OC-768. The update overhead can also be reduced.

原文English
主出版物標題Proceedings - 2009 International Conference on Advanced Information Networking and Applications, AINA 2009
頁面263-269
頁數7
DOIs
出版狀態Published - 2009
事件2009 International Conference on Advanced Information Networking and Applications, AINA 2009 - Bradford, United Kingdom
持續時間: 2009 五月 262009 五月 29

出版系列

名字Proceedings - International Conference on Advanced Information Networking and Applications, AINA
ISSN(列印)1550-445X

Other

Other2009 International Conference on Advanced Information Networking and Applications, AINA 2009
國家/地區United Kingdom
城市Bradford
期間09-05-2609-05-29

All Science Journal Classification (ASJC) codes

  • 工程 (全部)

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