@article{160249b89eda42e5877d86ab6d38a7bd,
title = "A planarized shallow-trench-isolation for GaAs devices fabrication using liquid phase chemical enhanced oxidation process",
abstract = "A new planarized trench isolation technique for GaAs devices fabrication by a liquid phase chemical-enhanced oxidation (LPCEO) method is proposed. The LPCEO-trench-isolation technique can be operated at low temperature with a simple and low-cost process. As compared with conventional mesa isolation, the LPCEO-trench-isolation can provide better planarity and isolation properties. Finally, GaAs MOSFET's fabricated with LPCEO-trench-isolation and selective oxidized gate both by the LPCEO method are demonstrated.",
author = "Wu, {Jau Yi} and Wang, {Hwei Heng} and Sze, {Po Wen} and Wang, {Yeong Her} and Houng, {Mau Phon}",
note = "Funding Information: Manuscript received December 17, 2001. This work was supported in part by the National Science Council of Taiwan, R.O.C., under Contracts NSC 89-2215-E-244-001 and NSC 89-2219-E-006-025, and the Foundation of Chen, Jieh-Chen Scholarship, Tainan, Taiwan, R.O.C. The review of this letter was arranged by Editor D. Ueda.",
year = "2002",
month = may,
doi = "10.1109/55.998862",
language = "English",
volume = "23",
pages = "237--239",
journal = "IEEE Electron Device Letters",
issn = "0741-3106",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "5",
}