A Practical Current Sensing Technique for iddqtesting

Jing Jou Tang, Kuen Jong Lee, Bin Da Liu

研究成果: Article同行評審

41 引文 斯高帕斯(Scopus)

摘要

In this paper, a practical design for built-in current sensors (BICS’s) is proposed. This scheme can execute current testing during the normal circuit operation with very small impact on the performance of the circuit under test (CUT). In addition, scalable resolutions and no external voltage/current reference make this design more effective and efficient than previous designs. Moreover this scheme can be used to monitor the current-related faults of both CMOS and non-CMOS circuits. Thus it is highly suitable for design for testability (DFT) on a multiple-chip module (MCM) or to be the current monitor on the test fixture under the quality test action group (QTAG) standard [1].

原文English
頁(從 - 到)302-310
頁數9
期刊IEEE Transactions on Very Large Scale Integration (VLSI) Systems
3
發行號2
DOIs
出版狀態Published - 1995 六月

All Science Journal Classification (ASJC) codes

  • 軟體
  • 硬體和架構
  • 電氣與電子工程

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