A quick jitter tolerance estimation technique for bang-bang CDRs

Yen Long Lee, Soon Jyh Chang

研究成果: Conference contribution

摘要

Simulating/Measuring the jitter tolerance of clock and data recovery (CDR) circuits, and confirming if the associated jitter tolerance meets the required specification for a specified communication standard, is an important consideration for designing/testing high-speed serial link interface circuits. However, conducting such performance evaluations are costly and time-consuming. In this paper, a simple but effective testing method for evaluating the tracking capability of bang-bang CDR circuits is introduced. The tracking capability of the CDR loop is obtained by simply inverting the recovered clock to produce a 0.5 unit interval (UI) phase shift and capture the tracking time. The proposed technique is easily implemented, because of its fully-digital characteristic, and suitable for testing CDRs that is embedded in a complex interface transceiver. Then, a quick jitter tolerance estimation technique based on the obtained tracking capability is proposed to simplify the time-consuming process as well as avoid the costly test equipment required for designing and/or testing CDR circuits. Experimental results show that the proposed techniques could precisely evaluate the tracking capability and efficiently reduce test costs in acquiring complete jitter tolerance testing.

原文English
主出版物標題ITC-Asia 2017 - International Test Conference in Asia
發行者Institute of Electrical and Electronics Engineers Inc.
頁面8-13
頁數6
ISBN(電子)9781538630518
DOIs
出版狀態Published - 2017 十一月 3
事件1st International Test Conference in Asia, ITC-Asia 2017 - Taipei, Taiwan
持續時間: 2017 九月 132017 九月 15

出版系列

名字ITC-Asia 2017 - International Test Conference in Asia

Other

Other1st International Test Conference in Asia, ITC-Asia 2017
國家Taiwan
城市Taipei
期間17-09-1317-09-15

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Automotive Engineering
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality

指紋 深入研究「A quick jitter tolerance estimation technique for bang-bang CDRs」主題。共同形成了獨特的指紋。

引用此