A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors

Albert Lee, Chieh Pu Lo, Chien Chen Lin, Wei Hao Chen, Kuo Hsiang Hsu, Zhibo Wang, Fang Su, Zhe Yuan, Qi Wei, Ya Chin King, Chrong Jung Lin, Hochul Lee, Pedram Khalili Amiri, Kang Lung Wang, Yu Wang, Huazhong Yang, Yongpan Liu, Meng Fan Chang

研究成果: Article同行評審

27 引文 斯高帕斯(Scopus)

摘要

Nonvolatile flip-flops (nvFFs) enable frequent-off processors to achieve fast power-off and wake-up time while maintaining critical local computing states through parallel data movement between volatile FFs and local nonvolatile memory (NVM) devices. However, current nvFFs face challenges in large store energy ( \text{E}-{\mathrm {S}} ) and long voltage stress time on the device ( \text{T}-{\mathrm {STRESS}} ), due to wide distribution in the write time of NVM device as well as unnecessary writes. Moreover, heavy parasitic load on the power rail cause long wake-up time for restoring data from NVM to FFs. This paper proposes the resistive RAM (ReRAM)-based nvFF with self-write termination (SWT) and reduced loading on power rail to: 1) reduce 93+% waste of \text{E}-{\mathrm {S}} from fast switching or matched cells; 2) suppress endurance and reliability degradation resulted from overprogramming and long \text{T}-{\mathrm {STRESS}} ; and 3) achieve reliable and 26+ times faster restore operation compared with previous nvFFs. We have fabricated a nonvolatile processor and a test chip with SWT-nvFFs using logic-process ReRAM in a 65-nm CMOS process. Measured results show sub-2-ns termination response time and sub-20-ns chip-level restore time.

原文English
文章編號7961232
頁(從 - 到)2194-2207
頁數14
期刊IEEE Journal of Solid-State Circuits
52
發行號8
DOIs
出版狀態Published - 2017 八月

All Science Journal Classification (ASJC) codes

  • 電氣與電子工程

指紋

深入研究「A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors」主題。共同形成了獨特的指紋。

引用此