A room temperature process for the fabrication of amorphous indium gallium zinc oxide thin-film transistors with co-sputtered ZrxSi1-xO2 Gate dielectric and improved electrical and hysteresis performance

Chien Hsiung Hung, Shui Jinn Wang, Pang Yi Liu, Chien Hung Wu, Nai Sheng Wu, Hao Ping Yan, Tseng Hsing Lin

研究成果: Article › 同行評審

3 引文 斯高帕斯（Scopus）

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Engineering & Materials Science

Physics & Astronomy