A run-pause-resume silicon debug technique with cycle granularity for multiple clock domain systems

Shuo Lian Hong, Kuen-Jong Lee

研究成果: Conference contribution

摘要

A novel run-pause-resume (RPR) debug methodology that can achieve complete cycle-level granularity of debug resolution for multiple clock domain systems is proposed. With this methodology one can pause the normal operation of a system at any cycle of any clock domain and resume the system without causing any data invalidation problem. Bidirectional transactions among different clock domains are analyzed and supported with this methodology. A debug platform with both breakpoint-setup software and clock-gating hardware is developed. The former allows the user to setup the breakpoint and calculate the exact time to transmit the pause control signal. The latter converts the pause signal to appropriate gating signals for the circuits under debug and the clock domain crossing interface. Experimental results show that the hardware area overhead is very small and 100% debug resolution is achieved. The experimented circuits include an industrial JPEG decoder system, several open-source cores and a system containing three clock domains.

原文English
主出版物標題Proceedings - 2017 IEEE International Test Conference, ITC 2017
發行者Institute of Electrical and Electronics Engineers Inc.
頁面1-10
頁數10
ISBN(電子)9781538634134
DOIs
出版狀態Published - 2017 十二月 29
事件48th IEEE International Test Conference, ITC 2017 - Forth Worth, United States
持續時間: 2017 十月 312017 十一月 2

出版系列

名字Proceedings - International Test Conference
2017-December
ISSN(列印)1089-3539

Other

Other48th IEEE International Test Conference, ITC 2017
國家United States
城市Forth Worth
期間17-10-3117-11-02

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Applied Mathematics

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