A simulation toolkit for x86-compatible processors - Xsim

Hung Chang Hsiao, Chung Ta King, Wei Kuo Chen, Hsian Hsiung Lin, Chien Chao Tseng

研究成果: Article同行評審

2 引文 斯高帕斯(Scopus)

摘要

Functional-level simulators have become an indispensable tool in designing today's processors. They help to exploit the design space and evaluate various design options so as to derive a suitable processor microarchitecture. Although Intel's x86 series processors are the most popular CPU in the computers, there are only a few simulation tools available for studying these processors. This paper introduces such a simulation tool. Internally it simulates a decoupled decode/encode architecture and has a RISC core. It is trace-driven and thus has a tracing system, a trace sampling system, and a processor simulator. We will describe the internal workings of the simulation tool and demonstrate how it can be used in evaluating a specific x86-compatible processor.

原文English
頁(從 - 到)427-446
頁數20
期刊International Journal of High Speed Computing
10
發行號4
DOIs
出版狀態Published - 1999 十二月

All Science Journal Classification (ASJC) codes

  • 理論電腦科學
  • 計算機理論與數學

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